1/* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#ifndef _CONFIG_SYNOLOGY_DS414_H 8#define _CONFIG_SYNOLOGY_DS414_H 9 10/* 11 * High Level Configuration Options (easy to change) 12 */ 13#define CONFIG_DISPLAY_BOARDINFO_LATE 14 15/* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20#define CONFIG_SYS_TEXT_BASE 0x00800000 21#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 22 23/* 24 * Commands configuration 25 */ 26#define CONFIG_CMD_ENV 27 28/* I2C */ 29#define CONFIG_SYS_I2C 30#define CONFIG_SYS_I2C_MVTWSI 31#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 32#define CONFIG_SYS_I2C_SLAVE 0x0 33#define CONFIG_SYS_I2C_SPEED 100000 34 35/* SPI NOR flash default params, used by sf commands */ 36#define CONFIG_SF_DEFAULT_SPEED 1000000 37#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 38 39/* Environment in SPI NOR flash */ 40#define CONFIG_ENV_IS_IN_SPI_FLASH 41#define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ 42#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 43#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 44 45#define CONFIG_PHY_MARVELL /* there is a marvell phy */ 46#define CONFIG_PHY_ADDR { 0x1, 0x0 } 47#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 48 49#define CONFIG_SYS_ALT_MEMTEST 50 51/* PCIe support */ 52#ifndef CONFIG_SPL_BUILD 53#define CONFIG_CMD_PCI 54#define CONFIG_CMD_PCI_ENUM 55#define CONFIG_PCI_MVEBU 56#define CONFIG_PCI_SCAN_SHOW 57#endif 58 59/* USB/EHCI/XHCI configuration */ 60 61#define CONFIG_DM_USB 62#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 63 64/* FIXME: broken XHCI support 65 * Below defines should enable support for the two rear USB3 ports. Sadly, this 66 * does not work because: 67 * - xhci-pci seems to not support DM_USB, so with that enabled it is not 68 * found. 69 * - USB init fails, controller does not respond in time */ 70#if 0 71#undef CONFIG_DM_USB 72#define CONFIG_USB_XHCI_PCI 73#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 74#endif 75 76#if !defined(CONFIG_USB_XHCI_HCD) 77#define CONFIG_USB_EHCI 78#define CONFIG_USB_EHCI_MARVELL 79#define CONFIG_EHCI_IS_TDI 80#endif 81 82/* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ 83#define CONFIG_SUPPORT_VFAT 84#define CONFIG_SYS_MVFS 85 86/* 87 * mv-common.h should be defined after CMD configs since it used them 88 * to enable certain macros 89 */ 90#include "mv-common.h" 91 92/* 93 * Memory layout while starting into the bin_hdr via the 94 * BootROM: 95 * 96 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 97 * 0x4000.4030 bin_hdr start address 98 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 99 * 0x4007.fffc BootROM stack top 100 * 101 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 102 * L2 cache thus cannot be used. 103 */ 104 105/* SPL */ 106/* Defines for SPL */ 107#define CONFIG_SPL_FRAMEWORK 108#define CONFIG_SPL_TEXT_BASE 0x40004030 109#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 110 111#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 112#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 113 114#ifdef CONFIG_SPL_BUILD 115#define CONFIG_SYS_MALLOC_SIMPLE 116#endif 117 118#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 119#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 120 121/* SPL related SPI defines */ 122#define CONFIG_SPL_SPI_LOAD 123#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 124 125/* DS414 bus width is 32bits */ 126#define CONFIG_DDR_32BIT 127 128/* Use random ethernet address if not configured */ 129#define CONFIG_LIB_RAND 130#define CONFIG_NET_RANDOM_ETHADDR 131 132/* Default Environment */ 133#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" 134#define CONFIG_BOOTARGS "console=ttyS0,115200" 135#define CONFIG_LOADADDR 0x80000 136#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ 137#define CONFIG_PREBOOT "usb start; sf probe" 138 139#endif /* _CONFIG_SYNOLOGY_DS414_H */ 140