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10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#include <asm/hardware.h>
14
15
16#define CONFIG_SYS_TEXT_BASE 0x27000000
17
18
19#define CONFIG_SKIP_LOWLEVEL_INIT
20
21
22#define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
23
24
25#define CONFIG_ARCH_CPU_INIT
26
27
28#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
29#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
30
31
32#define CONFIG_SRAM_BASE 0x00300000
33#define CONFIG_SRAM_SIZE (32 << 10)
34#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
35 GENERATED_GBL_DATA_SIZE)
36
37
38#define CONFIG_NR_DRAM_BANKS 1
39#define CONFIG_SYS_SDRAM_BASE 0x20000000
40#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
41#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
42#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
43#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
44#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
45#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE \
46 - CONFIG_SYS_MALLOC_LEN)
47
48
49# define CONFIG_SYS_MAX_FLASH_BANKS 1
50# define CONFIG_SYS_FLASH_BASE 0x00200000
51# define CONFIG_AT91_EFLASH
52# define CONFIG_SYS_MAX_FLASH_SECT 32
53# define CONFIG_SYS_FLASH_PROTECTION
54# define CONFIG_EFLASH_PROTSECTORS 1
55
56
57#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
58#define CONFIG_HAS_DATAFLASH
59#define CONFIG_ATMEL_DATAFLASH_SPI
60#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
61#define DATAFLASH_TCSS (0x1a << 16)
62#define DATAFLASH_TCHS (0x1 << 24)
63
64#define CONFIG_ENV_IS_IN_SPI_FLASH
65#define CONFIG_ENV_OFFSET 0x3DE000
66#define CONFIG_ENV_SECT_SIZE (132 << 10)
67#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
68#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
69 + CONFIG_ENV_OFFSET)
70#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
71 + 0x042000)
72
73
74#define CONFIG_ATMEL_SPI
75#define AT91_SPI_CLK 15000000
76
77
78#define CONFIG_ATMEL_USART
79#define CONFIG_USART3
80#define CONFIG_BAUDRATE 115200
81#define CONFIG_USART_BASE ATMEL_BASE_DBGU
82#define CONFIG_USART_ID ATMEL_ID_SYS
83
84
85#define CONFIG_AT91_GPIO
86
87
88#define CONFIG_CMD_JFFS2
89#define CONFIG_CMD_MTDPARTS
90#define CONFIG_CMD_NAND
91
92#ifndef MINIMAL_LOADER
93#define CONFIG_CMD_BSP
94#define CONFIG_CMD_DATE
95#define CONFIG_CMD_REISER
96#define CONFIG_CMD_SAVES
97#define CONFIG_CMD_UBIFS
98#endif
99
100
101#ifdef CONFIG_CMD_NAND
102#define CONFIG_SYS_MAX_NAND_DEVICE 1
103#define CONFIG_SYS_NAND_BASE 0x40000000
104#define CONFIG_SYS_NAND_DBW_8
105#define CONFIG_NAND_ATMEL
106
107#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
108
109#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
110#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
111#endif
112
113
114#ifdef CONFIG_CMD_JFFS2
115#define CONFIG_JFFS2_CMDLINE
116#define CONFIG_JFFS2_NAND
117#endif
118
119
120#define CONFIG_NET_RETRY_COUNT 20
121#define CONFIG_MACB
122#define CONFIG_RMII
123#define CONFIG_PHY_ID 0
124#define CONFIG_MACB_SEARCH_PHY
125
126
127#ifdef CONFIG_CMD_MMC
128#define CONFIG_GENERIC_ATMEL_MCI
129#define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
130#endif
131
132
133#ifdef CONFIG_CMD_USB
134#define CONFIG_USB_ATMEL
135#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
136#define CONFIG_USB_OHCI_NEW
137#define CONFIG_SYS_USB_OHCI_CPU_INIT
138#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
139#define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
140#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
141#endif
142
143
144#if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
145#define CONFIG_RTC_PCF8563
146#define CONFIG_SYS_I2C_RTC_ADDR 0x51
147#endif
148
149
150#define CONFIG_SYS_MAX_I2C_BUS 1
151
152#define CONFIG_SYS_I2C
153#define CONFIG_SYS_I2C_SOFT
154#define CONFIG_SYS_I2C_SOFT_SPEED 100000
155#define CONFIG_SYS_I2C_SOFT_SLAVE 0
156
157#define I2C_SOFT_DECLARATIONS
158
159#define GPIO_I2C_SCL AT91_PIO_PORTA, 24
160#define GPIO_I2C_SDA AT91_PIO_PORTA, 23
161
162#define I2C_INIT { \
163 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
164 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
165 at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
166 at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
167 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
168}
169
170#define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
171#define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
172#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
173#define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
174#define I2C_DELAY udelay(100)
175#define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
176
177
178#ifdef CONFIG_CMD_DHCP
179#define CONFIG_BOOTP_BOOTFILESIZE
180#define CONFIG_BOOTP_BOOTPATH
181#define CONFIG_BOOTP_GATEWAY
182#define CONFIG_BOOTP_HOSTNAME
183#define CONFIG_SYS_AUTOLOAD "n"
184#endif
185
186
187#define CONFIG_MTD_DEVICE
188#define CONFIG_MTD_PARTITIONS
189#if defined(CONFIG_CMD_MTDPARTS) || defined(CONFIG_CMD_NAND)
190#define MTDIDS_DEFAULT "nand0=atmel_nand"
191#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:-(root)"
192#endif
193#define CONFIG_LZO
194#define CONFIG_RBTREE
195
196
197#define CONFIG_CMDLINE_TAG
198#define CONFIG_SETUP_MEMORY_TAGS
199#define CONFIG_INITRD_TAG
200#define CONFIG_BOOTCOMMAND "cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm"
201#if defined(CONFIG_CMD_NAND)
202#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
203 "root=/dev/mtdblock0 " \
204 MTDPARTS_DEFAULT \
205 " rw rootfstype=jffs2"
206#endif
207
208
209#define CONFIG_SYS_CBSIZE 256
210#define CONFIG_SYS_MAXARGS 16
211#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16 \
212 + sizeof(CONFIG_SYS_PROMPT))
213#define CONFIG_SYS_LONGHELP
214#define CONFIG_CMDLINE_EDITING
215
216#endif
217