LXR uboot/arch/arm/cpu/arm1176/start.S

   1/*
   2 *  armboot - Startup Code for ARM1176 CPU-core
   3 *
   4 * Copyright (c) 2007   Samsung Electronics
   5 *
   6 * Copyright (C) 2008
   7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
   8 *
   9 * SPDX-License-Identifier:     GPL-2.0+
  10 *
  11 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
  12 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
  13 * jsgood (jsgood.yang@samsung.com)
  14 * Base codes by scsuh (sc.suh)
  15 */
  16
  17#include <asm-offsets.h>
  18#include <config.h>
  19#include <linux/linkage.h>
  20
  21#ifndef CONFIG_SYS_PHY_UBOOT_BASE
  22#define CONFIG_SYS_PHY_UBOOT_BASE       CONFIG_SYS_UBOOT_BASE
  23#endif
  24
  25/*
  26 *************************************************************************
  27 *
  28 * Startup Code (reset vector)
  29 *
  30 * do important init only if we don't start from memory!
  31 * setup Memory and board specific bits prior to relocation.
  32 * relocate armboot to ram
  33 * setup stack
  34 *
  35 *************************************************************************
  36 */
  37
  38        .globl reset
  39
  40reset:
  41        /* Allow the board to save important registers */
  42        b       save_boot_params
  43.globl  save_boot_params_ret
  44save_boot_params_ret:
  45
  46        /*
  47         * set the cpu to SVC32 mode
  48         */
  49        mrs     r0, cpsr
  50        bic     r0, r0, #0x3f
  51        orr     r0, r0, #0xd3
  52        msr     cpsr, r0
  53
  54/*
  55 *************************************************************************
  56 *
  57 * CPU_init_critical registers
  58 *
  59 * setup important registers
  60 * setup memory timing
  61 *
  62 *************************************************************************
  63 */
  64        /*
  65         * we do sys-critical inits only at reboot,
  66         * not when booting from ram!
  67         */
  68cpu_init_crit:
  69        /*
  70         * When booting from NAND - it has definitely been a reset, so, no need
  71         * to flush caches and disable the MMU
  72         */
  73#ifndef CONFIG_SPL_BUILD
  74        /*
  75         * flush v4 I/D caches
  76         */
  77        mov     r0, #0
  78        mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
  79        mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
  80
  81        /*
  82         * disable MMU stuff and caches
  83         */
  84        mrc     p15, 0, r0, c1, c0, 0
  85        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
  86        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
  87        orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
  88        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
  89
  90        /* Prepare to disable the MMU */
  91        adr     r2, mmu_disable_phys
  92        sub     r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
  93        b       mmu_disable
  94
  95        .align 5
  96        /* Run in a single cache-line */
  97mmu_disable:
  98        mcr     p15, 0, r0, c1, c0, 0
  99        nop
 100        nop
 101        mov     pc, r2
 102mmu_disable_phys:
 103
 104#endif
 105
 106        /*
 107         * Go setup Memory and board specific bits prior to relocation.
 108         */
 109        bl      lowlevel_init           /* go setup pll,mux,memory */
 110
 111        bl      _main
 112
 113/*------------------------------------------------------------------------------*/
 114
 115        .globl  c_runtime_cpu_setup
 116c_runtime_cpu_setup:
 117
 118        mov     pc, lr
 119
 120WEAK(save_boot_params)
 121        b       save_boot_params_ret    /* back to my caller */
 122ENDPROC(save_boot_params)
 123