uboot/drivers/clk/at91/clk-main.c
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   1/*
   2 * Copyright (C) 2016 Atmel Corporation
   3 *               Wenyou.Yang <wenyou.yang@atmel.com>
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9#include <clk-uclass.h>
  10#include <dm/device.h>
  11#include <linux/io.h>
  12#include <mach/at91_pmc.h>
  13#include "pmc.h"
  14
  15DECLARE_GLOBAL_DATA_PTR;
  16
  17static int main_osc_clk_enable(struct clk *clk)
  18{
  19        struct pmc_platdata *plat = dev_get_platdata(clk->dev);
  20        struct at91_pmc *pmc = plat->reg_base;
  21
  22        if (readl(&pmc->sr) & AT91_PMC_MOSCSELS)
  23                return 0;
  24
  25        return -EINVAL;
  26}
  27
  28static ulong main_osc_clk_get_rate(struct clk *clk)
  29{
  30        return gd->arch.main_clk_rate_hz;
  31}
  32
  33static struct clk_ops main_osc_clk_ops = {
  34        .enable = main_osc_clk_enable,
  35        .get_rate = main_osc_clk_get_rate,
  36};
  37
  38static int main_osc_clk_probe(struct udevice *dev)
  39{
  40        return at91_pmc_core_probe(dev);
  41}
  42
  43static const struct udevice_id main_osc_clk_match[] = {
  44        { .compatible = "atmel,at91sam9x5-clk-main" },
  45        {}
  46};
  47
  48U_BOOT_DRIVER(at91sam9x5_main_osc_clk) = {
  49        .name = "at91sam9x5-main-osc-clk",
  50        .id = UCLASS_CLK,
  51        .of_match = main_osc_clk_match,
  52        .probe = main_osc_clk_probe,
  53        .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
  54        .ops = &main_osc_clk_ops,
  55};
  56