1
2
3
4
5
6
7
8
9
10#include <common.h>
11#include <dm.h>
12#include <errno.h>
13#include <malloc.h>
14#include <memalign.h>
15#include <usb.h>
16#include <asm/unaligned.h>
17#include <linux/mii.h>
18#include "usb_ether.h"
19
20
21
22
23#define LED_GPIO_CFG (0x24)
24#define LED_GPIO_CFG_SPD_LED (0x01000000)
25#define LED_GPIO_CFG_LNK_LED (0x00100000)
26#define LED_GPIO_CFG_FDX_LED (0x00010000)
27
28
29#define TX_CMD_A_FIRST_SEG_ 0x00002000
30#define TX_CMD_A_LAST_SEG_ 0x00001000
31
32
33#define RX_STS_FL_ 0x3FFF0000
34#define RX_STS_ES_ 0x00008000
35
36
37#define ID_REV 0x00
38
39#define INT_STS 0x08
40
41#define TX_CFG 0x10
42#define TX_CFG_ON_ 0x00000004
43
44#define HW_CFG 0x14
45#define HW_CFG_BIR_ 0x00001000
46#define HW_CFG_RXDOFF_ 0x00000600
47#define HW_CFG_MEF_ 0x00000020
48#define HW_CFG_BCE_ 0x00000002
49#define HW_CFG_LRST_ 0x00000008
50
51#define PM_CTRL 0x20
52#define PM_CTL_PHY_RST_ 0x00000010
53
54#define AFC_CFG 0x2C
55
56
57
58
59
60
61
62#define AFC_CFG_DEFAULT 0x00F830A1
63
64#define E2P_CMD 0x30
65#define E2P_CMD_BUSY_ 0x80000000
66#define E2P_CMD_READ_ 0x00000000
67#define E2P_CMD_TIMEOUT_ 0x00000400
68#define E2P_CMD_LOADED_ 0x00000200
69#define E2P_CMD_ADDR_ 0x000001FF
70
71#define E2P_DATA 0x34
72
73#define BURST_CAP 0x38
74
75#define INT_EP_CTL 0x68
76#define INT_EP_CTL_PHY_INT_ 0x00008000
77
78#define BULK_IN_DLY 0x6C
79
80
81#define MAC_CR 0x100
82#define MAC_CR_MCPAS_ 0x00080000
83#define MAC_CR_PRMS_ 0x00040000
84#define MAC_CR_HPFILT_ 0x00002000
85#define MAC_CR_TXEN_ 0x00000008
86#define MAC_CR_RXEN_ 0x00000004
87
88#define ADDRH 0x104
89
90#define ADDRL 0x108
91
92#define MII_ADDR 0x114
93#define MII_WRITE_ 0x02
94#define MII_BUSY_ 0x01
95#define MII_READ_ 0x00
96
97#define MII_DATA 0x118
98
99#define FLOW 0x11C
100
101#define VLAN1 0x120
102
103#define COE_CR 0x130
104#define Tx_COE_EN_ 0x00010000
105#define Rx_COE_EN_ 0x00000001
106
107
108#define PHY_INT_SRC 29
109
110#define PHY_INT_MASK 30
111#define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040)
112#define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010)
113#define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \
114 PHY_INT_MASK_LINK_DOWN_)
115
116
117#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
118#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
119
120
121#define HS_USB_PKT_SIZE 512
122#define FS_USB_PKT_SIZE 64
123
124#define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE)
125#define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE)
126#define DEFAULT_BULK_IN_DELAY 0x00002000
127#define MAX_SINGLE_PACKET_SIZE 2048
128#define EEPROM_MAC_OFFSET 0x01
129#define SMSC95XX_INTERNAL_PHY_ID 1
130#define ETH_P_8021Q 0x8100
131
132
133#define SMSC95XX_BASE_NAME "sms"
134#define USB_CTRL_SET_TIMEOUT 5000
135#define USB_CTRL_GET_TIMEOUT 5000
136#define USB_BULK_SEND_TIMEOUT 5000
137#define USB_BULK_RECV_TIMEOUT 5000
138
139#define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE
140#define PHY_CONNECT_TIMEOUT 5000
141
142#define TURBO_MODE
143
144#ifndef CONFIG_DM_ETH
145
146static int curr_eth_dev;
147#endif
148
149
150struct smsc95xx_private {
151#ifdef CONFIG_DM_ETH
152 struct ueth_data ueth;
153#endif
154 size_t rx_urb_size;
155 u32 mac_cr;
156 int have_hwaddr;
157};
158
159
160
161
162static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
163{
164 int len;
165 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
166
167 cpu_to_le32s(&data);
168 tmpbuf[0] = data;
169
170 len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
171 USB_VENDOR_REQUEST_WRITE_REGISTER,
172 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
173 0, index, tmpbuf, sizeof(data),
174 USB_CTRL_SET_TIMEOUT);
175 if (len != sizeof(data)) {
176 debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
177 index, data, len);
178 return -EIO;
179 }
180 return 0;
181}
182
183static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
184{
185 int len;
186 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
187
188 len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
189 USB_VENDOR_REQUEST_READ_REGISTER,
190 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
191 0, index, tmpbuf, sizeof(*data),
192 USB_CTRL_GET_TIMEOUT);
193 *data = tmpbuf[0];
194 if (len != sizeof(*data)) {
195 debug("smsc95xx_read_reg failed: index=%d, len=%d",
196 index, len);
197 return -EIO;
198 }
199
200 le32_to_cpus(data);
201 return 0;
202}
203
204
205static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
206{
207 unsigned long start_time = get_timer(0);
208 u32 val;
209
210 do {
211 smsc95xx_read_reg(udev, MII_ADDR, &val);
212 if (!(val & MII_BUSY_))
213 return 0;
214 } while (get_timer(start_time) < 1000);
215
216 return -ETIMEDOUT;
217}
218
219static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
220{
221 u32 val, addr;
222
223
224 if (smsc95xx_phy_wait_not_busy(udev)) {
225 debug("MII is busy in smsc95xx_mdio_read\n");
226 return -ETIMEDOUT;
227 }
228
229
230 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
231 smsc95xx_write_reg(udev, MII_ADDR, addr);
232
233 if (smsc95xx_phy_wait_not_busy(udev)) {
234 debug("Timed out reading MII reg %02X\n", idx);
235 return -ETIMEDOUT;
236 }
237
238 smsc95xx_read_reg(udev, MII_DATA, &val);
239
240 return (u16)(val & 0xFFFF);
241}
242
243static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
244 int regval)
245{
246 u32 val, addr;
247
248
249 if (smsc95xx_phy_wait_not_busy(udev)) {
250 debug("MII is busy in smsc95xx_mdio_write\n");
251 return;
252 }
253
254 val = regval;
255 smsc95xx_write_reg(udev, MII_DATA, val);
256
257
258 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
259 smsc95xx_write_reg(udev, MII_ADDR, addr);
260
261 if (smsc95xx_phy_wait_not_busy(udev))
262 debug("Timed out writing MII reg %02X\n", idx);
263}
264
265static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
266{
267 unsigned long start_time = get_timer(0);
268 u32 val;
269
270 do {
271 smsc95xx_read_reg(udev, E2P_CMD, &val);
272 if (!(val & E2P_CMD_BUSY_))
273 return 0;
274 udelay(40);
275 } while (get_timer(start_time) < 1 * 1000 * 1000);
276
277 debug("EEPROM is busy\n");
278 return -ETIMEDOUT;
279}
280
281static int smsc95xx_wait_eeprom(struct usb_device *udev)
282{
283 unsigned long start_time = get_timer(0);
284 u32 val;
285
286 do {
287 smsc95xx_read_reg(udev, E2P_CMD, &val);
288 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
289 break;
290 udelay(40);
291 } while (get_timer(start_time) < 1 * 1000 * 1000);
292
293 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
294 debug("EEPROM read operation timeout\n");
295 return -ETIMEDOUT;
296 }
297 return 0;
298}
299
300static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
301 u8 *data)
302{
303 u32 val;
304 int i, ret;
305
306 ret = smsc95xx_eeprom_confirm_not_busy(udev);
307 if (ret)
308 return ret;
309
310 for (i = 0; i < length; i++) {
311 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
312 smsc95xx_write_reg(udev, E2P_CMD, val);
313
314 ret = smsc95xx_wait_eeprom(udev);
315 if (ret < 0)
316 return ret;
317
318 smsc95xx_read_reg(udev, E2P_DATA, &val);
319 data[i] = val & 0xFF;
320 offset++;
321 }
322 return 0;
323}
324
325
326
327
328
329
330static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
331{
332 int bmcr;
333 int r = -1;
334
335
336 bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
337
338 if (bmcr & BMCR_ANENABLE) {
339 bmcr |= BMCR_ANRESTART;
340 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
341 r = 0;
342 }
343 return r;
344}
345
346static int smsc95xx_phy_initialize(struct usb_device *udev,
347 struct ueth_data *dev)
348{
349 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
350 smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
351 ADVERTISE_ALL | ADVERTISE_CSMA |
352 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
353
354
355 smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
356
357 smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
358 PHY_INT_MASK_DEFAULT_);
359 mii_nway_restart(udev, dev);
360
361 debug("phy initialised succesfully\n");
362 return 0;
363}
364
365static int smsc95xx_init_mac_address(unsigned char *enetaddr,
366 struct usb_device *udev)
367{
368 int ret;
369
370
371 ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
372 if (ret)
373 return ret;
374
375 if (is_valid_ethaddr(enetaddr)) {
376
377 debug("MAC address read from EEPROM\n");
378 return 0;
379 }
380
381
382
383
384
385 debug("Invalid MAC address read from EEPROM\n");
386
387 return -ENXIO;
388}
389
390static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
391 struct smsc95xx_private *priv,
392 unsigned char *enetaddr)
393{
394 u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
395 u32 addr_hi = get_unaligned_le16(&enetaddr[4]);
396 int ret;
397
398
399 debug("** %s()\n", __func__);
400 ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
401 if (ret < 0)
402 return ret;
403
404 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
405 if (ret < 0)
406 return ret;
407
408 debug("MAC %pM\n", enetaddr);
409 priv->have_hwaddr = 1;
410
411 return 0;
412}
413
414
415static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
416 int use_rx_csum)
417{
418 u32 read_buf;
419 int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
420 if (ret < 0)
421 return ret;
422
423 if (use_tx_csum)
424 read_buf |= Tx_COE_EN_;
425 else
426 read_buf &= ~Tx_COE_EN_;
427
428 if (use_rx_csum)
429 read_buf |= Rx_COE_EN_;
430 else
431 read_buf &= ~Rx_COE_EN_;
432
433 ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
434 if (ret < 0)
435 return ret;
436
437 debug("COE_CR = 0x%08x\n", read_buf);
438 return 0;
439}
440
441static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
442{
443
444 priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
445}
446
447
448static void smsc95xx_start_tx_path(struct usb_device *udev,
449 struct smsc95xx_private *priv)
450{
451 u32 reg_val;
452
453
454 priv->mac_cr |= MAC_CR_TXEN_;
455
456 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
457
458
459 reg_val = TX_CFG_ON_;
460 smsc95xx_write_reg(udev, TX_CFG, reg_val);
461}
462
463
464static void smsc95xx_start_rx_path(struct usb_device *udev,
465 struct smsc95xx_private *priv)
466{
467 priv->mac_cr |= MAC_CR_RXEN_;
468 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
469}
470
471static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
472 struct smsc95xx_private *priv,
473 unsigned char *enetaddr)
474{
475 int ret;
476 u32 write_buf;
477 u32 read_buf;
478 u32 burst_cap;
479 int timeout;
480#define TIMEOUT_RESOLUTION 50
481 int link_detected;
482
483 debug("** %s()\n", __func__);
484 dev->phy_id = SMSC95XX_INTERNAL_PHY_ID;
485
486 write_buf = HW_CFG_LRST_;
487 ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
488 if (ret < 0)
489 return ret;
490
491 timeout = 0;
492 do {
493 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
494 if (ret < 0)
495 return ret;
496 udelay(10 * 1000);
497 timeout++;
498 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
499
500 if (timeout >= 100) {
501 debug("timeout waiting for completion of Lite Reset\n");
502 return -ETIMEDOUT;
503 }
504
505 write_buf = PM_CTL_PHY_RST_;
506 ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
507 if (ret < 0)
508 return ret;
509
510 timeout = 0;
511 do {
512 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
513 if (ret < 0)
514 return ret;
515 udelay(10 * 1000);
516 timeout++;
517 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
518 if (timeout >= 100) {
519 debug("timeout waiting for PHY Reset\n");
520 return -ETIMEDOUT;
521 }
522#ifndef CONFIG_DM_ETH
523 if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
524 0)
525 priv->have_hwaddr = 1;
526#endif
527 if (!priv->have_hwaddr) {
528 puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
529 return -EADDRNOTAVAIL;
530 }
531 ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
532 if (ret < 0)
533 return ret;
534
535#ifdef TURBO_MODE
536 if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
537 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
538 priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
539 } else {
540 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
541 priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
542 }
543#else
544 burst_cap = 0;
545 priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
546#endif
547 debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
548
549 ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
550 if (ret < 0)
551 return ret;
552
553 ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
554 if (ret < 0)
555 return ret;
556 debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
557
558 read_buf = DEFAULT_BULK_IN_DELAY;
559 ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
560 if (ret < 0)
561 return ret;
562
563 ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
564 if (ret < 0)
565 return ret;
566 debug("Read Value from BULK_IN_DLY after writing: "
567 "0x%08x\n", read_buf);
568
569 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
570 if (ret < 0)
571 return ret;
572 debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
573
574#ifdef TURBO_MODE
575 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
576#endif
577 read_buf &= ~HW_CFG_RXDOFF_;
578
579#define NET_IP_ALIGN 0
580 read_buf |= NET_IP_ALIGN << 9;
581
582 ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
583 if (ret < 0)
584 return ret;
585
586 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
587 if (ret < 0)
588 return ret;
589 debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
590
591 write_buf = 0xFFFFFFFF;
592 ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
593 if (ret < 0)
594 return ret;
595
596 ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
597 if (ret < 0)
598 return ret;
599 debug("ID_REV = 0x%08x\n", read_buf);
600
601
602 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
603 LED_GPIO_CFG_FDX_LED;
604 ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
605 if (ret < 0)
606 return ret;
607 debug("LED_GPIO_CFG set\n");
608
609
610 write_buf = 0;
611 ret = smsc95xx_write_reg(udev, FLOW, write_buf);
612 if (ret < 0)
613 return ret;
614
615 read_buf = AFC_CFG_DEFAULT;
616 ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
617 if (ret < 0)
618 return ret;
619
620 ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
621 if (ret < 0)
622 return ret;
623
624
625 write_buf = (u32)ETH_P_8021Q;
626 ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
627 if (ret < 0)
628 return ret;
629
630
631 ret = smsc95xx_set_csums(udev, 0, 0);
632 if (ret < 0) {
633 debug("Failed to set csum offload: %d\n", ret);
634 return ret;
635 }
636 smsc95xx_set_multicast(priv);
637
638 ret = smsc95xx_phy_initialize(udev, dev);
639 if (ret < 0)
640 return ret;
641 ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
642 if (ret < 0)
643 return ret;
644
645
646 read_buf |= INT_EP_CTL_PHY_INT_;
647
648 ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
649 if (ret < 0)
650 return ret;
651
652 smsc95xx_start_tx_path(udev, priv);
653 smsc95xx_start_rx_path(udev, priv);
654
655 timeout = 0;
656 do {
657 link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
658 & BMSR_LSTATUS;
659 if (!link_detected) {
660 if (timeout == 0)
661 printf("Waiting for Ethernet connection... ");
662 udelay(TIMEOUT_RESOLUTION * 1000);
663 timeout += TIMEOUT_RESOLUTION;
664 }
665 } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
666 if (link_detected) {
667 if (timeout != 0)
668 printf("done.\n");
669 } else {
670 printf("unable to connect.\n");
671 return -EIO;
672 }
673 return 0;
674}
675
676static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
677{
678 int err;
679 int actual_len;
680 u32 tx_cmd_a;
681 u32 tx_cmd_b;
682 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
683 PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
684
685 debug("** %s(), len %d, buf %#x\n", __func__, length,
686 (unsigned int)(ulong)msg);
687 if (length > PKTSIZE)
688 return -ENOSPC;
689
690 tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
691 tx_cmd_b = (u32)length;
692 cpu_to_le32s(&tx_cmd_a);
693 cpu_to_le32s(&tx_cmd_b);
694
695
696 memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
697 memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
698 memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
699 length);
700 err = usb_bulk_msg(dev->pusb_dev,
701 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
702 (void *)msg,
703 length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
704 &actual_len,
705 USB_BULK_SEND_TIMEOUT);
706 debug("Tx: len = %u, actual = %u, err = %d\n",
707 (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
708 (unsigned int)actual_len, err);
709
710 return err;
711}
712
713#ifndef CONFIG_DM_ETH
714
715
716
717static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
718{
719 struct ueth_data *dev = (struct ueth_data *)eth->priv;
720 struct usb_device *udev = dev->pusb_dev;
721 struct smsc95xx_private *priv =
722 (struct smsc95xx_private *)dev->dev_priv;
723
724 return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
725}
726
727static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
728{
729 struct ueth_data *dev = (struct ueth_data *)eth->priv;
730
731 return smsc95xx_send_common(dev, packet, length);
732}
733
734static int smsc95xx_recv(struct eth_device *eth)
735{
736 struct ueth_data *dev = (struct ueth_data *)eth->priv;
737 DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
738 unsigned char *buf_ptr;
739 int err;
740 int actual_len;
741 u32 packet_len;
742 int cur_buf_align;
743
744 debug("** %s()\n", __func__);
745 err = usb_bulk_msg(dev->pusb_dev,
746 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
747 (void *)recv_buf, RX_URB_SIZE, &actual_len,
748 USB_BULK_RECV_TIMEOUT);
749 debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
750 actual_len, err);
751 if (err != 0) {
752 debug("Rx: failed to receive\n");
753 return -err;
754 }
755 if (actual_len > RX_URB_SIZE) {
756 debug("Rx: received too many bytes %d\n", actual_len);
757 return -ENOSPC;
758 }
759
760 buf_ptr = recv_buf;
761 while (actual_len > 0) {
762
763
764
765
766 if (actual_len < sizeof(packet_len)) {
767 debug("Rx: incomplete packet length\n");
768 return -EIO;
769 }
770 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
771 le32_to_cpus(&packet_len);
772 if (packet_len & RX_STS_ES_) {
773 debug("Rx: Error header=%#x", packet_len);
774 return -EIO;
775 }
776 packet_len = ((packet_len & RX_STS_FL_) >> 16);
777
778 if (packet_len > actual_len - sizeof(packet_len)) {
779 debug("Rx: too large packet: %d\n", packet_len);
780 return -EIO;
781 }
782
783
784 net_process_received_packet(buf_ptr + sizeof(packet_len),
785 packet_len - 4);
786
787
788 actual_len -= sizeof(packet_len) + packet_len;
789 buf_ptr += sizeof(packet_len) + packet_len;
790 cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf;
791
792 if (cur_buf_align & 0x03) {
793 int align = 4 - (cur_buf_align & 0x03);
794
795 actual_len -= align;
796 buf_ptr += align;
797 }
798 }
799 return err;
800}
801
802static void smsc95xx_halt(struct eth_device *eth)
803{
804 debug("** %s()\n", __func__);
805}
806
807static int smsc95xx_write_hwaddr(struct eth_device *eth)
808{
809 struct ueth_data *dev = eth->priv;
810 struct usb_device *udev = dev->pusb_dev;
811 struct smsc95xx_private *priv = dev->dev_priv;
812
813 return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
814}
815
816
817
818
819void smsc95xx_eth_before_probe(void)
820{
821 curr_eth_dev = 0;
822}
823
824struct smsc95xx_dongle {
825 unsigned short vendor;
826 unsigned short product;
827};
828
829static const struct smsc95xx_dongle smsc95xx_dongles[] = {
830 { 0x0424, 0xec00 },
831 { 0x0424, 0x9500 },
832 { 0x0424, 0x9730 },
833 { 0x0424, 0x9900 },
834 { 0x0424, 0x9e00 },
835 { 0x0000, 0x0000 }
836};
837
838
839int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
840 struct ueth_data *ss)
841{
842 struct usb_interface *iface;
843 struct usb_interface_descriptor *iface_desc;
844 int i;
845
846
847 iface = &dev->config.if_desc[ifnum];
848 iface_desc = &dev->config.if_desc[ifnum].desc;
849
850 for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
851 if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
852 dev->descriptor.idProduct == smsc95xx_dongles[i].product)
853
854 break;
855 }
856 if (smsc95xx_dongles[i].vendor == 0)
857 return 0;
858
859
860 debug("\n\nUSB Ethernet device detected\n");
861 memset(ss, '\0', sizeof(struct ueth_data));
862
863
864 ss->ifnum = ifnum;
865 ss->pusb_dev = dev;
866 ss->subclass = iface_desc->bInterfaceSubClass;
867 ss->protocol = iface_desc->bInterfaceProtocol;
868
869
870
871
872
873 for (i = 0; i < iface_desc->bNumEndpoints; i++) {
874
875 if ((iface->ep_desc[i].bmAttributes &
876 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
877 if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
878 ss->ep_in =
879 iface->ep_desc[i].bEndpointAddress &
880 USB_ENDPOINT_NUMBER_MASK;
881 else
882 ss->ep_out =
883 iface->ep_desc[i].bEndpointAddress &
884 USB_ENDPOINT_NUMBER_MASK;
885 }
886
887
888 if ((iface->ep_desc[i].bmAttributes &
889 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
890 ss->ep_int = iface->ep_desc[i].bEndpointAddress &
891 USB_ENDPOINT_NUMBER_MASK;
892 ss->irqinterval = iface->ep_desc[i].bInterval;
893 }
894 }
895 debug("Endpoints In %d Out %d Int %d\n",
896 ss->ep_in, ss->ep_out, ss->ep_int);
897
898
899 if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
900 !ss->ep_in || !ss->ep_out || !ss->ep_int) {
901 debug("Problems with device\n");
902 return 0;
903 }
904 dev->privptr = (void *)ss;
905
906
907 ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
908 if (!ss->dev_priv)
909 return 0;
910
911 return 1;
912}
913
914int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
915 struct eth_device *eth)
916{
917 debug("** %s()\n", __func__);
918 if (!eth) {
919 debug("%s: missing parameter.\n", __func__);
920 return 0;
921 }
922 sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
923 eth->init = smsc95xx_init;
924 eth->send = smsc95xx_send;
925 eth->recv = smsc95xx_recv;
926 eth->halt = smsc95xx_halt;
927 eth->write_hwaddr = smsc95xx_write_hwaddr;
928 eth->priv = ss;
929 return 1;
930}
931#endif
932
933#ifdef CONFIG_DM_ETH
934static int smsc95xx_eth_start(struct udevice *dev)
935{
936 struct usb_device *udev = dev_get_parent_priv(dev);
937 struct smsc95xx_private *priv = dev_get_priv(dev);
938 struct eth_pdata *pdata = dev_get_platdata(dev);
939
940
941 priv->have_hwaddr = 1;
942
943 return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
944}
945
946void smsc95xx_eth_stop(struct udevice *dev)
947{
948 debug("** %s()\n", __func__);
949}
950
951int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
952{
953 struct smsc95xx_private *priv = dev_get_priv(dev);
954
955 return smsc95xx_send_common(&priv->ueth, packet, length);
956}
957
958int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
959{
960 struct smsc95xx_private *priv = dev_get_priv(dev);
961 struct ueth_data *ueth = &priv->ueth;
962 uint8_t *ptr;
963 int ret, len;
964 u32 packet_len;
965
966 len = usb_ether_get_rx_bytes(ueth, &ptr);
967 debug("%s: first try, len=%d\n", __func__, len);
968 if (!len) {
969 if (!(flags & ETH_RECV_CHECK_DEVICE))
970 return -EAGAIN;
971 ret = usb_ether_receive(ueth, RX_URB_SIZE);
972 if (ret == -EAGAIN)
973 return ret;
974
975 len = usb_ether_get_rx_bytes(ueth, &ptr);
976 debug("%s: second try, len=%d\n", __func__, len);
977 }
978
979
980
981
982
983 if (len < sizeof(packet_len)) {
984 debug("Rx: incomplete packet length\n");
985 goto err;
986 }
987 memcpy(&packet_len, ptr, sizeof(packet_len));
988 le32_to_cpus(&packet_len);
989 if (packet_len & RX_STS_ES_) {
990 debug("Rx: Error header=%#x", packet_len);
991 goto err;
992 }
993 packet_len = ((packet_len & RX_STS_FL_) >> 16);
994
995 if (packet_len > len - sizeof(packet_len)) {
996 debug("Rx: too large packet: %d\n", packet_len);
997 goto err;
998 }
999
1000 *packetp = ptr + sizeof(packet_len);
1001 return packet_len;
1002
1003err:
1004 usb_ether_advance_rxbuf(ueth, -1);
1005 return -EINVAL;
1006}
1007
1008static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1009{
1010 struct smsc95xx_private *priv = dev_get_priv(dev);
1011
1012 packet_len = ALIGN(packet_len, 4);
1013 usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1014
1015 return 0;
1016}
1017
1018int smsc95xx_write_hwaddr(struct udevice *dev)
1019{
1020 struct usb_device *udev = dev_get_parent_priv(dev);
1021 struct eth_pdata *pdata = dev_get_platdata(dev);
1022 struct smsc95xx_private *priv = dev_get_priv(dev);
1023
1024 return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1025}
1026
1027int smsc95xx_read_rom_hwaddr(struct udevice *dev)
1028{
1029 struct usb_device *udev = dev_get_parent_priv(dev);
1030 struct eth_pdata *pdata = dev_get_platdata(dev);
1031 int ret;
1032
1033 ret = smsc95xx_init_mac_address(pdata->enetaddr, udev);
1034 if (ret)
1035 memset(pdata->enetaddr, 0, 6);
1036
1037 return 0;
1038}
1039
1040static int smsc95xx_eth_probe(struct udevice *dev)
1041{
1042 struct smsc95xx_private *priv = dev_get_priv(dev);
1043 struct ueth_data *ueth = &priv->ueth;
1044
1045 return usb_ether_register(dev, ueth, RX_URB_SIZE);
1046}
1047
1048static const struct eth_ops smsc95xx_eth_ops = {
1049 .start = smsc95xx_eth_start,
1050 .send = smsc95xx_eth_send,
1051 .recv = smsc95xx_eth_recv,
1052 .free_pkt = smsc95xx_free_pkt,
1053 .stop = smsc95xx_eth_stop,
1054 .write_hwaddr = smsc95xx_write_hwaddr,
1055 .read_rom_hwaddr = smsc95xx_read_rom_hwaddr,
1056};
1057
1058U_BOOT_DRIVER(smsc95xx_eth) = {
1059 .name = "smsc95xx_eth",
1060 .id = UCLASS_ETH,
1061 .probe = smsc95xx_eth_probe,
1062 .ops = &smsc95xx_eth_ops,
1063 .priv_auto_alloc_size = sizeof(struct smsc95xx_private),
1064 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
1065};
1066
1067static const struct usb_device_id smsc95xx_eth_id_table[] = {
1068 { USB_DEVICE(0x05ac, 0x1402) },
1069 { USB_DEVICE(0x0424, 0xec00) },
1070 { USB_DEVICE(0x0424, 0x9500) },
1071 { USB_DEVICE(0x0424, 0x9730) },
1072 { USB_DEVICE(0x0424, 0x9900) },
1073 { USB_DEVICE(0x0424, 0x9e00) },
1074 { }
1075};
1076
1077U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);
1078#endif
1079
