1/* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __AP_SH4A_4A_H 10#define __AP_SH4A_4A_H 11 12#define CONFIG_CPU_SH7734 1 13#define CONFIG_AP_SH4A_4A 1 14#define CONFIG_400MHZ_MODE 1 15/* #define CONFIG_533MHZ_MODE 1 */ 16 17#define CONFIG_SYS_TEXT_BASE 0x8BFC0000 18 19#define CONFIG_CMD_SDRAM 20#define CONFIG_CMD_ENV 21 22#define CONFIG_BOOTARGS "console=ttySC4,115200" 23 24#define CONFIG_DISPLAY_BOARDINFO 25#undef CONFIG_SHOW_BOOT_PROGRESS 26 27/* Ether */ 28#define CONFIG_SH_ETHER 1 29#define CONFIG_SH_ETHER_USE_PORT (0) 30#define CONFIG_SH_ETHER_PHY_ADDR (0x0) 31#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 32#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 33#define CONFIG_PHYLIB 34#define CONFIG_PHY_MICREL 1 35#define CONFIG_BITBANGMII 36#define CONFIG_BITBANGMII_MULTI 37 38/* I2C */ 39#define CONFIG_SH_SH7734_I2C 1 40#define CONFIG_HARD_I2C 1 41#define CONFIG_I2C_MULTI_BUS 1 42#define CONFIG_SYS_MAX_I2C_BUS 2 43#define CONFIG_SYS_I2C_MODULE 0 44#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 45#define CONFIG_SYS_I2C_SLAVE 0x50 46#define CONFIG_SH_I2C_DATA_HIGH 4 47#define CONFIG_SH_I2C_DATA_LOW 5 48#define CONFIG_SH_I2C_CLOCK 500000000 49#define CONFIG_SH_I2C_BASE0 0xFFC70000 50#define CONFIG_SH_I2C_BASE1 0xFFC71000 51 52/* undef to save memory */ 53#define CONFIG_SYS_LONGHELP 54/* Monitor Command Prompt */ 55/* Buffer size for input from the Console */ 56#define CONFIG_SYS_CBSIZE 256 57/* Buffer size for Console output */ 58#define CONFIG_SYS_PBSIZE 256 59/* max args accepted for monitor commands */ 60#define CONFIG_SYS_MAXARGS 16 61/* Buffer size for Boot Arguments passed to kernel */ 62#define CONFIG_SYS_BARGSIZE 512 63/* List of legal baudrate settings for this board */ 64#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 65 66/* SCIF */ 67#define CONFIG_SCIF_CONSOLE 1 68#define CONFIG_SCIF 1 69#define CONFIG_CONS_SCIF4 1 70 71/* Suppress display of console information at boot */ 72 73/* SDRAM */ 74#define CONFIG_SYS_SDRAM_BASE (0x88000000) 75#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 76#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 77 78#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 79#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 80/* Enable alternate, more extensive, memory test */ 81#undef CONFIG_SYS_ALT_MEMTEST 82/* Scratch address used by the alternate memory test */ 83#undef CONFIG_SYS_MEMTEST_SCRATCH 84 85/* Enable temporary baudrate change while serial download */ 86#undef CONFIG_SYS_LOADS_BAUD_CHANGE 87 88/* FLASH */ 89#define CONFIG_FLASH_CFI_DRIVER 1 90#define CONFIG_SYS_FLASH_CFI 91#undef CONFIG_SYS_FLASH_QUIET_TEST 92#define CONFIG_SYS_FLASH_EMPTY_INFO 93#define CONFIG_SYS_FLASH_BASE (0xA0000000) 94#define CONFIG_SYS_MAX_FLASH_SECT 512 95 96/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 97#define CONFIG_SYS_MAX_FLASH_BANKS 1 98#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 99 100/* Timeout for Flash erase operations (in ms) */ 101#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 102/* Timeout for Flash write operations (in ms) */ 103#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 104/* Timeout for Flash set sector lock bit operations (in ms) */ 105#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 106/* Timeout for Flash clear lock bit operations (in ms) */ 107#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 108 109/* 110 * Use hardware flash sectors protection instead 111 * of U-Boot software protection 112 */ 113#undef CONFIG_SYS_FLASH_PROTECTION 114#undef CONFIG_SYS_DIRECT_FLASH_TFTP 115 116/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 117#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 118/* Monitor size */ 119#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 120/* Size of DRAM reserved for malloc() use */ 121#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 122#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 123 124/* ENV setting */ 125#define CONFIG_ENV_IS_IN_FLASH 126#define CONFIG_ENV_OVERWRITE 1 127#define CONFIG_ENV_SECT_SIZE (128 * 1024) 128#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 129#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 130/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 131#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 132#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 133 134/* Board Clock */ 135#if defined(CONFIG_400MHZ_MODE) 136#define CONFIG_SYS_CLK_FREQ 50000000 137#else 138#define CONFIG_SYS_CLK_FREQ 44444444 139#endif 140#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 141#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 142#define CONFIG_SYS_TMU_CLK_DIV 4 143 144#endif /* __AP_SH4A_4A_H */ 145