LXR uboot/include/configs/at91sam9m10g45ek.h

   1/*
   2 * (C) Copyright 2007-2008
   3 * Stelian Pop <stelian@popies.net>
   4 * Lead Tech Design <www.leadtechdesign.com>
   5 *
   6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#ifndef __CONFIG_H
  12#define __CONFIG_H
  13
  14#include <asm/hardware.h>
  15
  16#define CONFIG_SYS_TEXT_BASE            0x73f00000
  17
  18#define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  19
  20/* ARM asynchronous clock */
  21#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  22#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  23
  24#define CONFIG_AT91SAM9M10G45EK
  25
  26#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  27#define CONFIG_SETUP_MEMORY_TAGS
  28#define CONFIG_INITRD_TAG
  29#define CONFIG_SKIP_LOWLEVEL_INIT
  30
  31/* general purpose I/O */
  32#define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  33#define CONFIG_AT91_GPIO
  34#define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  35
  36/* serial console */
  37#define CONFIG_ATMEL_USART
  38#define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  39#define CONFIG_USART_ID                 ATMEL_ID_SYS
  40
  41/* LCD */
  42#define LCD_BPP                         LCD_COLOR8
  43#define CONFIG_LCD_LOGO
  44#undef LCD_TEST_PATTERN
  45#define CONFIG_LCD_INFO
  46#define CONFIG_LCD_INFO_BELOW_LOGO
  47#define CONFIG_ATMEL_LCD
  48#define CONFIG_ATMEL_LCD_RGB565
  49/* board specific(not enough SRAM) */
  50#define CONFIG_AT91SAM9G45_LCD_BASE             0x73E00000
  51
  52/* LED */
  53#define CONFIG_AT91_LED
  54#define CONFIG_RED_LED          AT91_PIN_PD31   /* this is the user1 led */
  55#define CONFIG_GREEN_LED        AT91_PIN_PD0    /* this is the user2 led */
  56
  57
  58/*
  59 * BOOTP options
  60 */
  61#define CONFIG_BOOTP_BOOTFILESIZE
  62#define CONFIG_BOOTP_BOOTPATH
  63#define CONFIG_BOOTP_GATEWAY
  64#define CONFIG_BOOTP_HOSTNAME
  65
  66/*
  67 * Command line configuration.
  68 */
  69
  70#define CONFIG_CMD_NAND
  71
  72/* SDRAM */
  73#define CONFIG_NR_DRAM_BANKS            1
  74#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
  75#define CONFIG_SYS_SDRAM_SIZE           0x08000000
  76
  77#define CONFIG_SYS_INIT_SP_ADDR \
  78        (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  79
  80/* NAND flash */
  81#ifdef CONFIG_CMD_NAND
  82#define CONFIG_NAND_ATMEL
  83#define CONFIG_SYS_MAX_NAND_DEVICE              1
  84#define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
  85#define CONFIG_SYS_NAND_DBW_8
  86/* our ALE is AD21 */
  87#define CONFIG_SYS_NAND_MASK_ALE                (1 << 21)
  88/* our CLE is AD22 */
  89#define CONFIG_SYS_NAND_MASK_CLE                (1 << 22)
  90#define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
  91#define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC8
  92
  93#endif
  94
  95/* MMC */
  96
  97#ifdef CONFIG_CMD_MMC
  98#define CONFIG_GENERIC_ATMEL_MCI
  99#endif
 100
 101/* Ethernet */
 102#define CONFIG_MACB
 103#define CONFIG_RMII
 104#define CONFIG_NET_RETRY_COUNT          20
 105#define CONFIG_RESET_PHY_R
 106#define CONFIG_AT91_WANTS_COMMON_PHY
 107
 108/* USB */
 109#define CONFIG_USB_EHCI
 110#define CONFIG_USB_EHCI_ATMEL
 111#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS      2
 112
 113#define CONFIG_SYS_LOAD_ADDR            0x22000000      /* load address */
 114
 115#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 116#define CONFIG_SYS_MEMTEST_END          0x23e00000
 117
 118#ifdef CONFIG_SYS_USE_NANDFLASH
 119/* bootstrap + u-boot + env in nandflash */
 120#define CONFIG_ENV_IS_IN_NAND
 121#define CONFIG_ENV_OFFSET               0xc0000
 122#define CONFIG_ENV_OFFSET_REDUND        0x100000
 123#define CONFIG_ENV_SIZE                 0x20000
 124
 125#define CONFIG_BOOTCOMMAND                                              \
 126        "nand read 0x70000000 0x200000 0x300000;"                       \
 127        "bootm 0x70000000"
 128#define CONFIG_BOOTARGS                                                 \
 129        "console=ttyS0,115200 earlyprintk "                             \
 130        "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 131        "256k(env),256k(env_redundant),256k(spare),"                    \
 132        "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 133        "root=/dev/mtdblock7 rw rootfstype=jffs2"
 134#elif CONFIG_SYS_USE_MMC
 135/* bootstrap + u-boot + env + linux in mmc */
 136#define FAT_ENV_INTERFACE       "mmc"
 137/*
 138 * We don't specify the part number, if device 0 has partition table, it means
 139 * the first partition; it no partition table, then take whole device as a
 140 * FAT file system.
 141 */
 142#define FAT_ENV_DEVICE_AND_PART "0"
 143#define FAT_ENV_FILE            "uboot.env"
 144#define CONFIG_ENV_IS_IN_FAT
 145#define CONFIG_FAT_WRITE
 146#define CONFIG_ENV_SIZE         0x4000
 147
 148#define CONFIG_BOOTARGS         "console=ttyS0,115200 " \
 149                                "mtdparts=atmel_nand:" \
 150                                "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
 151                                "root=/dev/mmcblk0p2 rw rootwait"
 152#define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x71000000 dtb; " \
 153                                "fatload mmc 0:1 0x72000000 zImage; " \
 154                                "bootz 0x72000000 - 0x71000000"
 155#endif
 156
 157#define CONFIG_SYS_CBSIZE               256
 158#define CONFIG_SYS_MAXARGS              16
 159#define CONFIG_SYS_LONGHELP
 160#define CONFIG_CMDLINE_EDITING
 161#define CONFIG_AUTO_COMPLETE
 162
 163/*
 164 * Size of malloc() pool
 165 */
 166#define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 167
 168/* Defines for SPL */
 169#define CONFIG_SPL_FRAMEWORK
 170#define CONFIG_SPL_TEXT_BASE            0x300000
 171#define CONFIG_SPL_MAX_SIZE             0x010000
 172#define CONFIG_SPL_STACK                0x310000
 173
 174#define CONFIG_SYS_MONITOR_LEN          0x80000
 175
 176#ifdef CONFIG_SYS_USE_MMC
 177
 178#define CONFIG_SPL_BSS_START_ADDR       0x70000000
 179#define CONFIG_SPL_BSS_MAX_SIZE         0x00080000
 180#define CONFIG_SYS_SPL_MALLOC_START     0x70080000
 181#define CONFIG_SYS_SPL_MALLOC_SIZE      0x00080000
 182
 183#define CONFIG_SPL_LDSCRIPT             arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
 184#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 185#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 186
 187#elif CONFIG_SYS_USE_NANDFLASH
 188#define CONFIG_SPL_NAND_DRIVERS
 189#define CONFIG_SPL_NAND_BASE
 190#define CONFIG_SPL_NAND_ECC
 191#define CONFIG_SPL_NAND_SOFTECC
 192#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 193#define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 194#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 195
 196#define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 197#define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 198#define CONFIG_SYS_NAND_PAGE_COUNT      64
 199#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 200#define CONFIG_SYS_NAND_ECCSIZE         256
 201#define CONFIG_SYS_NAND_ECCBYTES        3
 202#define CONFIG_SYS_NAND_OOBSIZE         64
 203#define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 204                                          48, 49, 50, 51, 52, 53, 54, 55, \
 205                                          56, 57, 58, 59, 60, 61, 62, 63, }
 206#endif
 207
 208#define CONFIG_SPL_ATMEL_SIZE
 209#define CONFIG_SYS_MASTER_CLOCK         132096000
 210#define CONFIG_SYS_AT91_PLLA            0x20c73f03
 211#define CONFIG_SYS_MCKR                 0x1301
 212#define CONFIG_SYS_MCKR_CSS             0x1302
 213
 214#endif
 215