1/* 2 * Configuation settings for the Hitachi Solution Engine 7722 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __MS7722SE_H 10#define __MS7722SE_H 11 12#define CONFIG_CPU_SH7722 1 13#define CONFIG_MS7722SE 1 14 15#define CONFIG_CMD_JFFS2 16#define CONFIG_CMD_SDRAM 17 18#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" 19 20#define CONFIG_DISPLAY_BOARDINFO 21#undef CONFIG_SHOW_BOOT_PROGRESS 22 23/* SMC9111 */ 24#define CONFIG_SMC91111 25#define CONFIG_SMC91111_BASE (0xB8000000) 26 27/* MEMORY */ 28#define MS7722SE_SDRAM_BASE (0x8C000000) 29#define MS7722SE_FLASH_BASE_1 (0xA0000000) 30#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024) 31 32#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 33#define CONFIG_SYS_LONGHELP /* undef to save memory */ 34#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 35#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 36#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 37#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ 38#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 39 40/* SCIF */ 41#define CONFIG_SCIF_CONSOLE 1 42#define CONFIG_CONS_SCIF0 1 43 44#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE) 45#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 46 47#undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */ 48#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */ 49 50#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */ 51 52#define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE) 53#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */ 54 55#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */ 56 57#define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image 58 in Flash (NOT run time address in SDRAM) ?!? */ 59#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */ 60#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ 61#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 62 63/* FLASH */ 64#define CONFIG_SYS_FLASH_CFI 65#define CONFIG_FLASH_CFI_DRIVER 66#undef CONFIG_SYS_FLASH_QUIET_TEST 67#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 68 69#define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */ 70 71#define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each 72 Flash chip */ 73 74/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */ 75#define CONFIG_SYS_MAX_FLASH_BANKS 2 76#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \ 77 CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \ 78 } 79 80#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */ 81#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */ 82#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ 83#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ 84 85#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */ 86 87#undef CONFIG_SYS_DIRECT_FLASH_TFTP 88 89#define CONFIG_ENV_IS_IN_FLASH 90#define CONFIG_ENV_OVERWRITE 1 91#define CONFIG_ENV_SECT_SIZE (8 * 1024) 92#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 93#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) 94#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 95#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 96#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 97 98/* Board Clock */ 99#define CONFIG_SYS_CLK_FREQ 33333333 100#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 101#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 102#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 103 104#endif /* __MS7722SE_H */ 105