1/* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __R0P7734_H 10#define __R0P7734_H 11 12#define CONFIG_CPU_SH7734 1 13#define CONFIG_R0P7734 1 14#define CONFIG_400MHZ_MODE 1 15/* #define CONFIG_533MHZ_MODE 1 */ 16 17#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 18 19#define CONFIG_CMD_SDRAM 20#define CONFIG_CMD_ENV 21 22#define CONFIG_BOOTARGS "console=ttySC3,115200" 23 24#define CONFIG_DISPLAY_BOARDINFO 25#undef CONFIG_SHOW_BOOT_PROGRESS 26 27/* Ether */ 28#define CONFIG_SH_ETHER 1 29#define CONFIG_SH_ETHER_USE_PORT (0) 30#define CONFIG_SH_ETHER_PHY_ADDR (0x0) 31#define CONFIG_PHYLIB 32#define CONFIG_PHY_SMSC 1 33#define CONFIG_BITBANGMII 34#define CONFIG_BITBANGMII_MULTI 35#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 36#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 37#ifndef CONFIG_SH_ETHER 38# define CONFIG_SMC911X 39# define CONFIG_SMC911X_16_BIT 40# define CONFIG_SMC911X_BASE (0x84000000) 41#endif 42 43/* I2C */ 44#define CONFIG_SH_SH7734_I2C 1 45#define CONFIG_HARD_I2C 1 46#define CONFIG_I2C_MULTI_BUS 1 47#define CONFIG_SYS_MAX_I2C_BUS 2 48#define CONFIG_SYS_I2C_MODULE 0 49#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 50#define CONFIG_SYS_I2C_SLAVE 0x50 51#define CONFIG_SH_I2C_DATA_HIGH 4 52#define CONFIG_SH_I2C_DATA_LOW 5 53#define CONFIG_SH_I2C_CLOCK 500000000 54#define CONFIG_SH_I2C_BASE0 0xFFC70000 55#define CONFIG_SH_I2C_BASE1 0xFFC7100 56 57/* undef to save memory */ 58#define CONFIG_SYS_LONGHELP 59/* Monitor Command Prompt */ 60/* Buffer size for input from the Console */ 61#define CONFIG_SYS_CBSIZE 256 62/* Buffer size for Console output */ 63#define CONFIG_SYS_PBSIZE 256 64/* max args accepted for monitor commands */ 65#define CONFIG_SYS_MAXARGS 16 66/* Buffer size for Boot Arguments passed to kernel */ 67#define CONFIG_SYS_BARGSIZE 512 68/* List of legal baudrate settings for this board */ 69#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 70 71/* SCIF */ 72#define CONFIG_SCIF_CONSOLE 1 73#define CONFIG_SCIF 1 74#define CONFIG_CONS_SCIF3 1 75 76/* Suppress display of console information at boot */ 77 78/* SDRAM */ 79#define CONFIG_SYS_SDRAM_BASE (0x88000000) 80#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 81#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 82 83#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 84#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 85/* Enable alternate, more extensive, memory test */ 86#undef CONFIG_SYS_ALT_MEMTEST 87/* Scratch address used by the alternate memory test */ 88#undef CONFIG_SYS_MEMTEST_SCRATCH 89 90/* Enable temporary baudrate change while serial download */ 91#undef CONFIG_SYS_LOADS_BAUD_CHANGE 92 93/* FLASH */ 94#define CONFIG_FLASH_CFI_DRIVER 1 95#define CONFIG_SYS_FLASH_CFI 96#undef CONFIG_SYS_FLASH_QUIET_TEST 97#define CONFIG_SYS_FLASH_EMPTY_INFO 98#define CONFIG_SYS_FLASH_BASE (0xA0000000) 99#define CONFIG_SYS_MAX_FLASH_SECT 512 100 101/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 102#define CONFIG_SYS_MAX_FLASH_BANKS 1 103#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 104 105/* Timeout for Flash erase operations (in ms) */ 106#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 107/* Timeout for Flash write operations (in ms) */ 108#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 109/* Timeout for Flash set sector lock bit operations (in ms) */ 110#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 111/* Timeout for Flash clear lock bit operations (in ms) */ 112#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 113 114/* 115 * Use hardware flash sectors protection instead 116 * of U-Boot software protection 117 */ 118#undef CONFIG_SYS_FLASH_PROTECTION 119#undef CONFIG_SYS_DIRECT_FLASH_TFTP 120 121/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 122#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 123/* Monitor size */ 124#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 125/* Size of DRAM reserved for malloc() use */ 126#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 127#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 128 129/* ENV setting */ 130#define CONFIG_ENV_IS_IN_FLASH 131#define CONFIG_ENV_OVERWRITE 1 132#define CONFIG_ENV_SECT_SIZE (128 * 1024) 133#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 134#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 135/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 136#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 137#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 138 139/* Board Clock */ 140#if defined(CONFIG_400MHZ_MODE) 141#define CONFIG_SYS_CLK_FREQ 50000000 142#else 143#define CONFIG_SYS_CLK_FREQ 44444444 144#endif 145#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 146#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 147#define CONFIG_SYS_TMU_CLK_DIV 4 148 149#endif /* __R0P7734_H */ 150