1/* 2 * Configuation settings for the Renesas Technology RSK 7203 3 * 4 * Copyright (C) 2008 Nobuhiro Iwamatsu 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#ifndef __RSK7203_H 11#define __RSK7203_H 12 13#define CONFIG_CPU_SH7203 1 14#define CONFIG_RSK7203 1 15 16#define CONFIG_CMD_SDRAM 17 18#define CONFIG_BOOTARGS "console=ttySC0,115200" 19#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ 20 21#define CONFIG_DISPLAY_BOARDINFO 22#undef CONFIG_SHOW_BOOT_PROGRESS 23 24/* MEMORY */ 25#define RSK7203_SDRAM_BASE 0x0C000000 26#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ 27#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) 28 29#define CONFIG_SYS_TEXT_BASE 0x0C7C0000 30#define CONFIG_SYS_LONGHELP /* undef to save memory */ 31#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 32#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 33#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 34/* Buffer size for Boot Arguments passed to kernel */ 35#define CONFIG_SYS_BARGSIZE 512 36/* List of legal baudrate settings for this board */ 37#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 38 39/* SCIF */ 40#define CONFIG_SCIF_CONSOLE 1 41#define CONFIG_CONS_SCIF0 1 42 43#define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE 44#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) 45 46#define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE 47#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 48 49#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) 50#define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1 51#define CONFIG_SYS_MONITOR_LEN (128 * 1024) 52#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 53#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 54 55/* FLASH */ 56#define CONFIG_FLASH_CFI_DRIVER 57#define CONFIG_SYS_FLASH_CFI 58#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 59#undef CONFIG_SYS_FLASH_QUIET_TEST 60#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 61#define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1 62#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 63#define CONFIG_SYS_MAX_FLASH_SECT 64 64#define CONFIG_SYS_MAX_FLASH_BANKS 1 65 66#define CONFIG_ENV_IS_IN_FLASH 67#define CONFIG_ENV_SECT_SIZE (64 * 1024) 68#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 69#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 70#define CONFIG_SYS_FLASH_ERASE_TOUT 12000 71#define CONFIG_SYS_FLASH_WRITE_TOUT 500 72 73/* Board Clock */ 74#define CONFIG_SYS_CLK_FREQ 33333333 75#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 76#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 77#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 78#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 79 80/* Network interface */ 81#define CONFIG_SMC911X 82#define CONFIG_SMC911X_16_BIT 83#define CONFIG_SMC911X_BASE (0x24000000) 84 85#endif /* __RSK7203_H */ 86