LXR uboot/board/freescale/m547xevb/m547xevb.c

   1/*
   2 * (C) Copyright 2000-2003
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
   6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#include <config.h>
  12#include <common.h>
  13#include <pci.h>
  14#include <asm/immap.h>
  15#include <asm/io.h>
  16
  17DECLARE_GLOBAL_DATA_PTR;
  18
  19int checkboard(void)
  20{
  21        puts("Board: ");
  22        puts("Freescale FireEngine 5475 EVB\n");
  23        return 0;
  24};
  25
  26int dram_init(void)
  27{
  28        siu_t *siu = (siu_t *) (MMAP_SIU);
  29        sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
  30        u32 dramsize, i;
  31#ifdef CONFIG_SYS_DRAMSZ1
  32        u32 temp;
  33#endif
  34
  35        out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
  36
  37        dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
  38        for (i = 0x13; i < 0x20; i++) {
  39                if (dramsize == (1 << i))
  40                        break;
  41        }
  42        i--;
  43        out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
  44
  45#ifdef CONFIG_SYS_DRAMSZ1
  46        temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
  47        for (i = 0x13; i < 0x20; i++) {
  48                if (temp == (1 << i))
  49                        break;
  50        }
  51        i--;
  52        dramsize += temp;
  53        out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
  54#endif
  55
  56        out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
  57        out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
  58
  59        /* Issue PALL */
  60        out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
  61
  62        /* Issue LEMR */
  63        out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
  64        out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
  65
  66        udelay(500);
  67
  68        /* Issue PALL */
  69        out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
  70
  71        /* Perform two refresh cycles */
  72        out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
  73        out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
  74
  75        out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
  76
  77        out_be32(&sdram->ctrl,
  78                (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
  79
  80        udelay(100);
  81
  82        gd->ram_size = dramsize;
  83
  84        return 0;
  85};
  86
  87int testdram(void)
  88{
  89        /* TODO: XXX XXX XXX */
  90        printf("DRAM test not implemented!\n");
  91
  92        return (0);
  93}
  94
  95#if defined(CONFIG_PCI)
  96/*
  97 * Initialize PCI devices, report devices found.
  98 */
  99static struct pci_controller hose;
 100extern void pci_mcf547x_8x_init(struct pci_controller *hose);
 101
 102void pci_init_board(void)
 103{
 104        pci_mcf547x_8x_init(&hose);
 105}
 106#endif                          /* CONFIG_PCI */
 107