1
2
3
4
5
6
7
8
9
10
11
12
13#include <common.h>
14#include <dm.h>
15#include <miiphy.h>
16#include <phy.h>
17
18#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23
24#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
28#define debug(fmt, args...) printf(fmt, ##args)
29#else
30#define debug(fmt, args...)
31#endif
32
33static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
36
37
38
39struct mii_dev *miiphy_get_dev_by_name(const char *devname)
40{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
55 return NULL;
56}
57
58
59
60
61
62void miiphy_init(void)
63{
64 INIT_LIST_HEAD(&mii_devs);
65 current_mii = NULL;
66}
67
68struct mii_dev *mdio_alloc(void)
69{
70 struct mii_dev *bus;
71
72 bus = malloc(sizeof(*bus));
73 if (!bus)
74 return bus;
75
76 memset(bus, 0, sizeof(*bus));
77
78
79 INIT_LIST_HEAD(&bus->link);
80
81 return bus;
82}
83
84void mdio_free(struct mii_dev *bus)
85{
86 free(bus);
87}
88
89int mdio_register(struct mii_dev *bus)
90{
91 if (!bus || !bus->read || !bus->write)
92 return -1;
93
94
95 if (miiphy_get_dev_by_name(bus->name)) {
96 printf("mdio_register: non unique device name '%s'\n",
97 bus->name);
98 return -1;
99 }
100
101
102 list_add_tail(&bus->link, &mii_devs);
103
104 if (!current_mii)
105 current_mii = bus;
106
107 return 0;
108}
109
110int mdio_register_seq(struct mii_dev *bus, int seq)
111{
112 int ret;
113
114
115 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
116 if (ret < 0)
117 return ret;
118
119 return mdio_register(bus);
120}
121
122int mdio_unregister(struct mii_dev *bus)
123{
124 if (!bus)
125 return 0;
126
127
128 list_del(&bus->link);
129
130 if (current_mii == bus)
131 current_mii = NULL;
132
133 return 0;
134}
135
136void mdio_list_devices(void)
137{
138 struct list_head *entry;
139
140 list_for_each(entry, &mii_devs) {
141 int i;
142 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
143
144 printf("%s:\n", bus->name);
145
146 for (i = 0; i < PHY_MAX_ADDR; i++) {
147 struct phy_device *phydev = bus->phymap[i];
148
149 if (phydev) {
150 printf("%x - %s", i, phydev->drv->name);
151
152 if (phydev->dev)
153 printf(" <--> %s\n", phydev->dev->name);
154 else
155 printf("\n");
156 }
157 }
158 }
159}
160
161int miiphy_set_current_dev(const char *devname)
162{
163 struct mii_dev *dev;
164
165 dev = miiphy_get_dev_by_name(devname);
166 if (dev) {
167 current_mii = dev;
168 return 0;
169 }
170
171 printf("No such device: %s\n", devname);
172
173 return 1;
174}
175
176struct mii_dev *mdio_get_current_dev(void)
177{
178 return current_mii;
179}
180
181struct phy_device *mdio_phydev_for_ethname(const char *ethname)
182{
183 struct list_head *entry;
184 struct mii_dev *bus;
185
186 list_for_each(entry, &mii_devs) {
187 int i;
188 bus = list_entry(entry, struct mii_dev, link);
189
190 for (i = 0; i < PHY_MAX_ADDR; i++) {
191 if (!bus->phymap[i] || !bus->phymap[i]->dev)
192 continue;
193
194 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
195 return bus->phymap[i];
196 }
197 }
198
199 printf("%s is not a known ethernet\n", ethname);
200 return NULL;
201}
202
203const char *miiphy_get_current_dev(void)
204{
205 if (current_mii)
206 return current_mii->name;
207
208 return NULL;
209}
210
211static struct mii_dev *miiphy_get_active_dev(const char *devname)
212{
213
214 if (current_mii)
215 if (strcmp(current_mii->name, devname) == 0)
216 return current_mii;
217
218
219 if (miiphy_set_current_dev(devname))
220 return NULL;
221 else
222 return current_mii;
223}
224
225
226
227
228
229
230
231
232
233
234
235int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
236 unsigned short *value)
237{
238 struct mii_dev *bus;
239 int ret;
240
241 bus = miiphy_get_active_dev(devname);
242 if (!bus)
243 return 1;
244
245 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
246 if (ret < 0)
247 return 1;
248
249 *value = (unsigned short)ret;
250 return 0;
251}
252
253
254
255
256
257
258
259
260
261
262
263int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
264 unsigned short value)
265{
266 struct mii_dev *bus;
267
268 bus = miiphy_get_active_dev(devname);
269 if (bus)
270 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
271
272 return 1;
273}
274
275
276
277
278
279void miiphy_listdev(void)
280{
281 struct list_head *entry;
282 struct mii_dev *dev;
283
284 puts("MII devices: ");
285 list_for_each(entry, &mii_devs) {
286 dev = list_entry(entry, struct mii_dev, link);
287 printf("'%s' ", dev->name);
288 }
289 puts("\n");
290
291 if (current_mii)
292 printf("Current device: '%s'\n", current_mii->name);
293}
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
309 unsigned char *model, unsigned char *rev)
310{
311 unsigned int reg = 0;
312 unsigned short tmp;
313
314 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
315 debug("PHY ID register 2 read failed\n");
316 return -1;
317 }
318 reg = tmp;
319
320 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
321
322 if (reg == 0xFFFF) {
323
324 return -1;
325 }
326
327 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
328 debug("PHY ID register 1 read failed\n");
329 return -1;
330 }
331 reg |= tmp << 16;
332 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
333
334 *oui = (reg >> 10);
335 *model = (unsigned char)((reg >> 4) & 0x0000003F);
336 *rev = (unsigned char)(reg & 0x0000000F);
337 return 0;
338}
339
340#ifndef CONFIG_PHYLIB
341
342
343
344
345
346
347
348
349
350int miiphy_reset(const char *devname, unsigned char addr)
351{
352 unsigned short reg;
353 int timeout = 500;
354
355 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
356 debug("PHY status read failed\n");
357 return -1;
358 }
359 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
360 debug("PHY reset failed\n");
361 return -1;
362 }
363#ifdef CONFIG_PHY_RESET_DELAY
364 udelay(CONFIG_PHY_RESET_DELAY);
365#endif
366
367
368
369
370
371 reg = 0x8000;
372 while (((reg & 0x8000) != 0) && timeout--) {
373 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
374 debug("PHY status read failed\n");
375 return -1;
376 }
377 udelay(1000);
378 }
379 if ((reg & 0x8000) == 0) {
380 return 0;
381 } else {
382 puts("PHY reset timed out\n");
383 return -1;
384 }
385 return 0;
386}
387#endif
388
389
390
391
392
393int miiphy_speed(const char *devname, unsigned char addr)
394{
395 u16 bmcr, anlpar, adv;
396
397#if defined(CONFIG_PHY_GIGE)
398 u16 btsr;
399
400
401
402
403
404 if (miiphy_is_1000base_x(devname, addr))
405 return _1000BASET;
406
407
408
409
410
411 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
412 printf("PHY 1000BT status");
413 goto miiphy_read_failed;
414 }
415 if (btsr != 0xFFFF &&
416 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
417 return _1000BASET;
418#endif
419
420
421 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
422 printf("PHY speed");
423 goto miiphy_read_failed;
424 }
425
426 if (bmcr & BMCR_ANENABLE) {
427
428 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
429 printf("PHY AN speed");
430 goto miiphy_read_failed;
431 }
432
433 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
434 puts("PHY AN adv speed");
435 goto miiphy_read_failed;
436 }
437 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
438 }
439
440 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
441
442miiphy_read_failed:
443 printf(" read failed, assuming 10BASE-T\n");
444 return _10BASET;
445}
446
447
448
449
450
451int miiphy_duplex(const char *devname, unsigned char addr)
452{
453 u16 bmcr, anlpar, adv;
454
455#if defined(CONFIG_PHY_GIGE)
456 u16 btsr;
457
458
459 if (miiphy_is_1000base_x(devname, addr)) {
460
461 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
462 printf("1000BASE-X PHY AN duplex");
463 goto miiphy_read_failed;
464 }
465 }
466
467
468
469
470 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
471 printf("PHY 1000BT status");
472 goto miiphy_read_failed;
473 }
474 if (btsr != 0xFFFF) {
475 if (btsr & PHY_1000BTSR_1000FD) {
476 return FULL;
477 } else if (btsr & PHY_1000BTSR_1000HD) {
478 return HALF;
479 }
480 }
481#endif
482
483
484 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
485 puts("PHY duplex");
486 goto miiphy_read_failed;
487 }
488
489 if (bmcr & BMCR_ANENABLE) {
490
491 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
492 puts("PHY AN duplex");
493 goto miiphy_read_failed;
494 }
495
496 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
497 puts("PHY AN adv duplex");
498 goto miiphy_read_failed;
499 }
500 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
501 FULL : HALF;
502 }
503
504 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
505
506miiphy_read_failed:
507 printf(" read failed, assuming half duplex\n");
508 return HALF;
509}
510
511
512
513
514
515
516int miiphy_is_1000base_x(const char *devname, unsigned char addr)
517{
518#if defined(CONFIG_PHY_GIGE)
519 u16 exsr;
520
521 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
522 printf("PHY extended status read failed, assuming no "
523 "1000BASE-X\n");
524 return 0;
525 }
526 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
527#else
528 return 0;
529#endif
530}
531
532#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
533
534
535
536
537int miiphy_link(const char *devname, unsigned char addr)
538{
539 unsigned short reg;
540
541
542 (void)miiphy_read(devname, addr, MII_BMSR, ®);
543 if (miiphy_read(devname, addr, MII_BMSR, ®)) {
544 puts("MII_BMSR read failed, assuming no link\n");
545 return 0;
546 }
547
548
549 if ((reg & BMSR_LSTATUS) != 0) {
550 return 1;
551 } else {
552 return 0;
553 }
554}
555#endif
556