LXR uboot/include/configs/tricorder.h

   1/*
   2 * (C) Copyright 2006-2008
   3 * Texas Instruments.
   4 * Richard Woodruff <r-woodruff2@ti.com>
   5 * Syed Mohammed Khasim <x0khasim@ti.com>
   6 *
   7 * (C) Copyright 2012
   8 * Corscience GmbH & Co. KG
   9 * Thomas Weber <weber@corscience.de>
  10 *
  11 * Configuration settings for the Tricorder board.
  12 *
  13 * SPDX-License-Identifier:     GPL-2.0+
  14 */
  15
  16#ifndef __CONFIG_H
  17#define __CONFIG_H
  18
  19#define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
  20/*
  21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  22 * 64 bytes before this address should be set aside for u-boot.img's
  23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
  24 * other needs.
  25 */
  26#define CONFIG_SYS_TEXT_BASE            0x80100000
  27
  28#define CONFIG_SDRC                     /* The chip has SDRC controller */
  29
  30#include <asm/arch/cpu.h>               /* get chip and board defs */
  31#include <asm/arch/omap.h>
  32
  33/* Clock Defines */
  34#define V_OSCK                          26000000 /* Clock output from T2 */
  35#define V_SCLK                          (V_OSCK >> 1)
  36
  37#define CONFIG_MISC_INIT_R
  38
  39#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  40#define CONFIG_SETUP_MEMORY_TAGS
  41#define CONFIG_INITRD_TAG
  42#define CONFIG_REVISION_TAG
  43
  44/* Size of malloc() pool */
  45#define CONFIG_SYS_MALLOC_LEN           (1024*1024)
  46
  47/* Hardware drivers */
  48
  49/* NS16550 Configuration */
  50#define CONFIG_SYS_NS16550_SERIAL
  51#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  52#define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
  53
  54/* select serial console configuration */
  55#define CONFIG_CONS_INDEX               3
  56#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  57#define CONFIG_SERIAL3                  3
  58#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  59                                        115200}
  60
  61/* I2C */
  62#define CONFIG_SYS_I2C
  63#define CONFIG_SYS_OMAP24_I2C_SPEED     100000
  64#define CONFIG_SYS_OMAP24_I2C_SLAVE     1
  65#define CONFIG_SYS_I2C_OMAP34XX
  66 
  67
  68/* EEPROM */
  69#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  70#define CONFIG_SYS_EEPROM_BUS_NUM       1
  71
  72/* TWL4030 */
  73#define CONFIG_TWL4030_LED
  74
  75/* Board NAND Info */
  76#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
  77#define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
  78#define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
  79                                                "128k(SPL)," \
  80                                                "1m(u-boot)," \
  81                                                "384k(u-boot-env1)," \
  82                                                "1152k(mtdoops)," \
  83                                                "384k(u-boot-env2)," \
  84                                                "5m(kernel)," \
  85                                                "2m(fdt)," \
  86                                                "-(ubi)"
  87
  88#define CONFIG_NAND_OMAP_GPMC
  89#define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
  90                                                        /* to access nand */
  91#define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
  92                                                        /* to access nand at */
  93                                                        /* CS0 */
  94#define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
  95                                                        /* devices */
  96#define CONFIG_BCH
  97#define CONFIG_SYS_NAND_MAX_OOBFREE     2
  98#define CONFIG_SYS_NAND_MAX_ECCPOS      56
  99
 100/* commands to include */
 101#define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
 102#define CONFIG_CMD_NAND                 /* NAND support */
 103#define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
 104#define CONFIG_CMD_UBIFS                /* UBIFS commands */
 105#define CONFIG_LZO                      /* LZO is needed for UBIFS */
 106
 107/* needed for ubi */
 108#define CONFIG_RBTREE
 109#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 110#define CONFIG_MTD_PARTITIONS
 111
 112/* Environment information (this is the common part) */
 113
 114
 115/* hang() the board on panic() */
 116#define CONFIG_PANIC_HANG
 117
 118/* environment placement (for NAND), is different for FLASHCARD but does not
 119 * harm there */
 120#define CONFIG_ENV_OFFSET               0x120000    /* env start */
 121#define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
 122#define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
 123#define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
 124
 125/* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
 126 * value can not be used here! */
 127#define CONFIG_LOADADDR         0x82000000
 128
 129#define CONFIG_COMMON_ENV_SETTINGS \
 130        "console=ttyO2,115200n8\0" \
 131        "mmcdev=0\0" \
 132        "vram=3M\0" \
 133        "defaultdisplay=lcd\0" \
 134        "kernelopts=mtdoops.mtddev=3\0" \
 135        "mtdparts=" MTDPARTS_DEFAULT "\0" \
 136        "mtdids=" MTDIDS_DEFAULT "\0" \
 137        "commonargs=" \
 138                "setenv bootargs console=${console} " \
 139                "${mtdparts} " \
 140                "${kernelopts} " \
 141                "vt.global_cursor_default=0 " \
 142                "vram=${vram} " \
 143                "omapdss.def_disp=${defaultdisplay}\0"
 144
 145#define CONFIG_BOOTCOMMAND "run autoboot"
 146
 147/* specific environment settings for different use cases
 148 * FLASHCARD: used to run a rdimage from sdcard to program the device
 149 * 'NORMAL': used to boot kernel from sdcard, nand, ...
 150 *
 151 * The main aim for the FLASHCARD skin is to have an embedded environment
 152 * which will not be influenced by any data already on the device.
 153 */
 154#ifdef CONFIG_FLASHCARD
 155
 156#define CONFIG_ENV_IS_NOWHERE
 157
 158/* the rdaddr is 16 MiB before the loadaddr */
 159#define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
 160
 161#define CONFIG_EXTRA_ENV_SETTINGS \
 162        CONFIG_COMMON_ENV_SETTINGS \
 163        CONFIG_ENV_RDADDR \
 164        "autoboot=" \
 165        "run commonargs; " \
 166        "setenv bootargs ${bootargs} " \
 167                "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
 168                "rdinit=/sbin/init; " \
 169        "mmc dev ${mmcdev}; mmc rescan; " \
 170        "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
 171        "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
 172        "bootm ${loadaddr} ${rdaddr}\0"
 173
 174#else /* CONFIG_FLASHCARD */
 175
 176#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
 177
 178#define CONFIG_ENV_IS_IN_NAND
 179
 180#define CONFIG_EXTRA_ENV_SETTINGS \
 181        CONFIG_COMMON_ENV_SETTINGS \
 182        "mmcargs=" \
 183                "run commonargs; " \
 184                "setenv bootargs ${bootargs} " \
 185                "root=/dev/mmcblk0p2 " \
 186                "rootwait " \
 187                "rw\0" \
 188        "nandargs=" \
 189                "run commonargs; " \
 190                "setenv bootargs ${bootargs} " \
 191                "root=ubi0:root " \
 192                "ubi.mtd=7 " \
 193                "rootfstype=ubifs " \
 194                "ro\0" \
 195        "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 196        "bootscript=echo Running bootscript from mmc ...; " \
 197                "source ${loadaddr}\0" \
 198        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 199        "mmcboot=echo Booting from mmc ...; " \
 200                "run mmcargs; " \
 201                "bootm ${loadaddr}\0" \
 202        "loaduimage_ubi=ubi part ubi; " \
 203                "ubifsmount ubi:root; " \
 204                "ubifsload ${loadaddr} /boot/uImage\0" \
 205        "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
 206        "nandboot=echo Booting from nand ...; " \
 207                "run nandargs; " \
 208                "run loaduimage_nand; " \
 209                "bootm ${loadaddr}\0" \
 210        "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
 211                        "if run loadbootscript; then " \
 212                                "run bootscript; " \
 213                        "else " \
 214                                "if run loaduimage; then " \
 215                                        "run mmcboot; " \
 216                                "else run nandboot; " \
 217                                "fi; " \
 218                        "fi; " \
 219                "else run nandboot; fi\0"
 220
 221#endif /* CONFIG_FLASHCARD */
 222
 223/* Miscellaneous configurable options */
 224#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 225#define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
 226#define CONFIG_AUTO_COMPLETE
 227#define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 228/* Print Buffer Size */
 229#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 230                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 231#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 232
 233/* Boot Argument Buffer Size */
 234#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 235
 236#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
 237#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 238                                        0x07000000) /* 112 MB */
 239
 240#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
 241
 242/*
 243 * OMAP3 has 12 GP timers, they can be driven by the system clock
 244 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 245 * This rate is divided by a local divisor.
 246 */
 247#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 248#define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
 249
 250/*  Physical Memory Map  */
 251#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 252#define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 253#define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 254
 255/* NAND and environment organization  */
 256#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 257
 258#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 259#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 260#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 261#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 262                                                CONFIG_SYS_INIT_RAM_SIZE - \
 263                                                GENERATED_GBL_DATA_SIZE)
 264
 265/* SRAM config */
 266#define CONFIG_SYS_SRAM_START           0x40200000
 267#define CONFIG_SYS_SRAM_SIZE            0x10000
 268
 269/* Defines for SPL */
 270#define CONFIG_SPL_FRAMEWORK
 271#define CONFIG_SPL_NAND_SIMPLE
 272
 273#define CONFIG_SPL_NAND_BASE
 274#define CONFIG_SPL_NAND_DRIVERS
 275#define CONFIG_SPL_NAND_ECC
 276#define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 277#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
 278#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 279
 280#define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 281#define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 282                                         CONFIG_SPL_TEXT_BASE)
 283
 284#define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
 285#define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 286
 287/* NAND boot config */
 288#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 289#define CONFIG_SYS_NAND_PAGE_COUNT      64
 290#define CONFIG_SYS_NAND_PAGE_SIZE       2048
 291#define CONFIG_SYS_NAND_OOBSIZE         64
 292#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 293#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 294#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
 295                                         13, 14, 16, 17, 18, 19, 20, 21, 22, \
 296                                         23, 24, 25, 26, 27, 28, 30, 31, 32, \
 297                                         33, 34, 35, 36, 37, 38, 39, 40, 41, \
 298                                         42, 44, 45, 46, 47, 48, 49, 50, 51, \
 299                                         52, 53, 54, 55, 56}
 300
 301#define CONFIG_SYS_NAND_ECCSIZE         512
 302#define CONFIG_SYS_NAND_ECCBYTES        13
 303#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 304
 305#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 306
 307#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 308#define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
 309
 310#define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 311#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
 312
 313#define CONFIG_SYS_ALT_MEMTEST
 314#define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
 315#endif /* __CONFIG_H */
 316