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11#include <common.h>
12#include <i2c.h>
13#include <linux/errno.h>
14#include <asm/io.h>
15#include <linux/compat.h>
16#ifdef CONFIG_DM_I2C
17#include <dm.h>
18#endif
19
20DECLARE_GLOBAL_DATA_PTR;
21
22
23
24
25
26
27#ifndef CONFIG_DM_I2C
28#if defined(CONFIG_ORION5X)
29#include <asm/arch/orion5x.h>
30#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
31#include <asm/arch/soc.h>
32#elif defined(CONFIG_ARCH_SUNXI)
33#include <asm/arch/i2c.h>
34#else
35#error Driver mvtwsi not supported by SoC or board
36#endif
37#endif
38
39
40
41
42
43#if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
44#include <asm/arch/i2c.h>
45#endif
46
47
48
49
50
51#ifdef CONFIG_ARCH_SUNXI
52
53struct mvtwsi_registers {
54 u32 slave_address;
55 u32 xtnd_slave_addr;
56 u32 data;
57 u32 control;
58 u32 status;
59 u32 baudrate;
60 u32 soft_reset;
61};
62
63#else
64
65struct mvtwsi_registers {
66 u32 slave_address;
67 u32 data;
68 u32 control;
69 union {
70 u32 status;
71 u32 baudrate;
72 };
73 u32 xtnd_slave_addr;
74 u32 reserved[2];
75 u32 soft_reset;
76};
77
78#endif
79
80#ifdef CONFIG_DM_I2C
81struct mvtwsi_i2c_dev {
82
83 struct mvtwsi_registers *base;
84
85 int index;
86
87 u8 slaveadd;
88
89 uint speed;
90
91 uint tick;
92};
93#endif
94
95
96
97
98
99enum mvtwsi_ctrl_register_fields {
100
101 MVTWSI_CONTROL_ACK = 0x00000004,
102
103 MVTWSI_CONTROL_IFLG = 0x00000008,
104
105 MVTWSI_CONTROL_STOP = 0x00000010,
106
107 MVTWSI_CONTROL_START = 0x00000020,
108
109 MVTWSI_CONTROL_TWSIEN = 0x00000040,
110
111 MVTWSI_CONTROL_INTEN = 0x00000080,
112};
113
114
115
116
117
118
119#ifdef CONFIG_SUNXI_GEN_SUN6I
120#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
121#else
122#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
123#endif
124
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134
135
136enum mvstwsi_status_values {
137
138 MVTWSI_STATUS_START = 0x08,
139
140 MVTWSI_STATUS_REPEATED_START = 0x10,
141
142 MVTWSI_STATUS_ADDR_W_ACK = 0x18,
143
144 MVTWSI_STATUS_DATA_W_ACK = 0x28,
145
146 MVTWSI_STATUS_ADDR_R_ACK = 0x40,
147
148 MVTWSI_STATUS_ADDR_R_NAK = 0x48,
149
150 MVTWSI_STATUS_DATA_R_ACK = 0x50,
151
152 MVTWSI_STATUS_DATA_R_NAK = 0x58,
153
154 MVTWSI_STATUS_IDLE = 0xF8,
155};
156
157
158
159
160
161enum mvtwsi_ack_flags {
162
163 MVTWSI_READ_NAK = 0,
164
165 MVTWSI_READ_ACK = 1,
166};
167
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172
173
174inline uint calc_tick(uint speed)
175{
176
177
178 return (1000000000u / speed) + 100;
179}
180
181#ifndef CONFIG_DM_I2C
182
183
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186
187
188
189static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
190{
191 switch (adap->hwadapnr) {
192#ifdef CONFIG_I2C_MVTWSI_BASE0
193 case 0:
194 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
195#endif
196#ifdef CONFIG_I2C_MVTWSI_BASE1
197 case 1:
198 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
199#endif
200#ifdef CONFIG_I2C_MVTWSI_BASE2
201 case 2:
202 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
203#endif
204#ifdef CONFIG_I2C_MVTWSI_BASE3
205 case 3:
206 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
207#endif
208#ifdef CONFIG_I2C_MVTWSI_BASE4
209 case 4:
210 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
211#endif
212#ifdef CONFIG_I2C_MVTWSI_BASE5
213 case 5:
214 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
215#endif
216 default:
217 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
218 break;
219 }
220
221 return NULL;
222}
223#endif
224
225
226
227
228enum mvtwsi_error_class {
229
230 MVTWSI_ERROR_WRONG_STATUS = 0x01,
231
232 MVTWSI_ERROR_TIMEOUT = 0x02,
233};
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247
248inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
249{
250 return ((ec << 24) & 0xFF000000)
251 | ((lc << 16) & 0x00FF0000)
252 | ((ls << 8) & 0x0000FF00)
253 | (es & 0xFF);
254}
255
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261
262static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
263 uint tick)
264{
265 int control, status;
266 int timeout = 1000;
267
268 do {
269 control = readl(&twsi->control);
270 if (control & MVTWSI_CONTROL_IFLG) {
271 status = readl(&twsi->status);
272 if (status == expected_status)
273 return 0;
274 else
275 return mvtwsi_error(
276 MVTWSI_ERROR_WRONG_STATUS,
277 control, status, expected_status);
278 }
279 ndelay(tick);
280 } while (timeout--);
281 status = readl(&twsi->status);
282 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
283 expected_status);
284}
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298
299static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
300 uint tick)
301{
302
303 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
304 MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
305
306 return twsi_wait(twsi, expected_status, tick);
307}
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321
322static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
323 int expected_status, uint tick)
324{
325
326 writel(byte, &twsi->data);
327
328 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
329 &twsi->control);
330
331 return twsi_wait(twsi, expected_status, tick);
332}
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346
347static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
348 uint tick)
349{
350 int expected_status, status, control;
351
352
353 expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
354 MVTWSI_STATUS_DATA_R_NAK;
355
356 control = MVTWSI_CONTROL_TWSIEN;
357 control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
358 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
359
360 status = twsi_wait(twsi, expected_status, tick);
361
362 if (status == 0)
363 *byte = readl(&twsi->data);
364 return status;
365}
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377
378static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
379{
380 int control, stop_status;
381 int status = 0;
382 int timeout = 1000;
383
384
385 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
386 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
387
388 do {
389 stop_status = readl(&twsi->status);
390 if (stop_status == MVTWSI_STATUS_IDLE)
391 break;
392 ndelay(tick);
393 } while (timeout--);
394 control = readl(&twsi->control);
395 if (stop_status != MVTWSI_STATUS_IDLE)
396 status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
397 control, status, MVTWSI_STATUS_IDLE);
398 return status;
399}
400
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407
408static uint twsi_calc_freq(const int n, const int m)
409{
410#ifdef CONFIG_ARCH_SUNXI
411 return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
412#else
413 return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
414#endif
415}
416
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424
425static void twsi_reset(struct mvtwsi_registers *twsi)
426{
427
428 writel(0, &twsi->soft_reset);
429
430 udelay(20000);
431}
432
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444static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
445 uint requested_speed)
446{
447 uint tmp_speed, highest_speed, n, m;
448 uint baud = 0x44;
449
450 highest_speed = 0;
451
452
453
454 for (n = 0; n < 8; n++) {
455 for (m = 0; m < 16; m++) {
456 tmp_speed = twsi_calc_freq(n, m);
457 if ((tmp_speed <= requested_speed) &&
458 (tmp_speed > highest_speed)) {
459 highest_speed = tmp_speed;
460 baud = (m << 3) | n;
461 }
462 }
463 }
464 writel(baud, &twsi->baudrate);
465
466
467#ifdef CONFIG_DM_I2C
468 ndelay(calc_tick(highest_speed));
469#else
470 ndelay(10000);
471#endif
472 return highest_speed;
473}
474
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486
487static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
488 int slaveadd, uint *actual_speed)
489{
490
491 twsi_reset(twsi);
492
493 *actual_speed = __twsi_i2c_set_bus_speed(twsi, speed);
494
495 writel(slaveadd, &twsi->slave_address);
496 writel(0, &twsi->xtnd_slave_addr);
497
498#ifdef CONFIG_DM_I2C
499 (void) twsi_stop(twsi, calc_tick(*actual_speed));
500#else
501 (void) twsi_stop(twsi, 10000);
502#endif
503}
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522static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
523 u8 addr, uint tick)
524{
525 int status, expected_addr_status;
526
527
528
529 if (addr & 1)
530 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
531 else
532 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
533
534 status = twsi_start(twsi, expected_start_status, tick);
535
536 if (status == 0)
537 status = twsi_send(twsi, addr, expected_addr_status, tick);
538
539 return status;
540}
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553
554static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
555 uint tick)
556{
557 u8 dummy_byte;
558 int status;
559
560
561 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
562
563 if (status == 0)
564 status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
565
566 twsi_stop(twsi, tick);
567
568 return status;
569}
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593static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
594 u8 *addr, int alen, uchar *data, int length,
595 uint tick)
596{
597 int status = 0;
598 int stop_status;
599 int expected_start = MVTWSI_STATUS_START;
600
601 if (alen > 0) {
602
603 status = i2c_begin(twsi, expected_start, (chip << 1), tick);
604
605 while ((status == 0) && alen--)
606 status = twsi_send(twsi, addr[alen],
607 MVTWSI_STATUS_DATA_W_ACK, tick);
608
609 expected_start = MVTWSI_STATUS_REPEATED_START;
610 }
611
612 if (status == 0)
613 status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
614
615
616 while ((status == 0) && length--)
617 status = twsi_recv(twsi, data++,
618 length > 0 ?
619 MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
620
621 stop_status = twsi_stop(twsi, tick);
622
623 return status != 0 ? status : stop_status;
624}
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641
642static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
643 u8 *addr, int alen, uchar *data, int length,
644 uint tick)
645{
646 int status, stop_status;
647
648
649
650 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
651
652 while ((status == 0) && (alen-- > 0))
653 status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
654 tick);
655
656 while ((status == 0) && (length-- > 0))
657 status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
658 tick);
659
660 stop_status = twsi_stop(twsi, tick);
661
662 return status != 0 ? status : stop_status;
663}
664
665#ifndef CONFIG_DM_I2C
666static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
667 int slaveadd)
668{
669 struct mvtwsi_registers *twsi = twsi_get_base(adap);
670 __twsi_i2c_init(twsi, speed, slaveadd, NULL);
671}
672
673static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
674 uint requested_speed)
675{
676 struct mvtwsi_registers *twsi = twsi_get_base(adap);
677 __twsi_i2c_set_bus_speed(twsi, requested_speed);
678 return 0;
679}
680
681static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
682{
683 struct mvtwsi_registers *twsi = twsi_get_base(adap);
684 return __twsi_i2c_probe_chip(twsi, chip, 10000);
685}
686
687static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
688 int alen, uchar *data, int length)
689{
690 struct mvtwsi_registers *twsi = twsi_get_base(adap);
691 u8 addr_bytes[4];
692
693 addr_bytes[0] = (addr >> 0) & 0xFF;
694 addr_bytes[1] = (addr >> 8) & 0xFF;
695 addr_bytes[2] = (addr >> 16) & 0xFF;
696 addr_bytes[3] = (addr >> 24) & 0xFF;
697
698 return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
699 10000);
700}
701
702static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
703 int alen, uchar *data, int length)
704{
705 struct mvtwsi_registers *twsi = twsi_get_base(adap);
706 u8 addr_bytes[4];
707
708 addr_bytes[0] = (addr >> 0) & 0xFF;
709 addr_bytes[1] = (addr >> 8) & 0xFF;
710 addr_bytes[2] = (addr >> 16) & 0xFF;
711 addr_bytes[3] = (addr >> 24) & 0xFF;
712
713 return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
714 10000);
715}
716
717#ifdef CONFIG_I2C_MVTWSI_BASE0
718U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
719 twsi_i2c_read, twsi_i2c_write,
720 twsi_i2c_set_bus_speed,
721 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
722#endif
723#ifdef CONFIG_I2C_MVTWSI_BASE1
724U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
725 twsi_i2c_read, twsi_i2c_write,
726 twsi_i2c_set_bus_speed,
727 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
728
729#endif
730#ifdef CONFIG_I2C_MVTWSI_BASE2
731U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
732 twsi_i2c_read, twsi_i2c_write,
733 twsi_i2c_set_bus_speed,
734 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
735
736#endif
737#ifdef CONFIG_I2C_MVTWSI_BASE3
738U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
739 twsi_i2c_read, twsi_i2c_write,
740 twsi_i2c_set_bus_speed,
741 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
742
743#endif
744#ifdef CONFIG_I2C_MVTWSI_BASE4
745U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
746 twsi_i2c_read, twsi_i2c_write,
747 twsi_i2c_set_bus_speed,
748 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
749
750#endif
751#ifdef CONFIG_I2C_MVTWSI_BASE5
752U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
753 twsi_i2c_read, twsi_i2c_write,
754 twsi_i2c_set_bus_speed,
755 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
756
757#endif
758#else
759
760static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
761 u32 chip_flags)
762{
763 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
764 return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
765}
766
767static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
768{
769 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
770
771 dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
772 dev->tick = calc_tick(dev->speed);
773
774 return 0;
775}
776
777static int mvtwsi_i2c_ofdata_to_platdata(struct udevice *bus)
778{
779 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
780
781 dev->base = devfdt_get_addr_ptr(bus);
782
783 if (!dev->base)
784 return -ENOMEM;
785
786 dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
787 "cell-index", -1);
788 dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
789 "u-boot,i2c-slave-addr", 0x0);
790 dev->speed = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
791 "clock-frequency", 100000);
792 return 0;
793}
794
795static int mvtwsi_i2c_probe(struct udevice *bus)
796{
797 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
798 uint actual_speed;
799
800 __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
801 dev->speed = actual_speed;
802 dev->tick = calc_tick(dev->speed);
803 return 0;
804}
805
806static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
807{
808 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
809 struct i2c_msg *dmsg, *omsg, dummy;
810
811 memset(&dummy, 0, sizeof(struct i2c_msg));
812
813
814
815 if (nmsgs > 2 || nmsgs == 0) {
816 debug("%s: Only one or two messages are supported.", __func__);
817 return -1;
818 }
819
820 omsg = nmsgs == 1 ? &dummy : msg;
821 dmsg = nmsgs == 1 ? msg : msg + 1;
822
823 if (dmsg->flags & I2C_M_RD)
824 return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf,
825 omsg->len, dmsg->buf, dmsg->len,
826 dev->tick);
827 else
828 return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf,
829 omsg->len, dmsg->buf, dmsg->len,
830 dev->tick);
831}
832
833static const struct dm_i2c_ops mvtwsi_i2c_ops = {
834 .xfer = mvtwsi_i2c_xfer,
835 .probe_chip = mvtwsi_i2c_probe_chip,
836 .set_bus_speed = mvtwsi_i2c_set_bus_speed,
837};
838
839static const struct udevice_id mvtwsi_i2c_ids[] = {
840 { .compatible = "marvell,mv64xxx-i2c", },
841 { .compatible = "marvell,mv78230-i2c", },
842 { .compatible = "allwinner,sun6i-a31-i2c", },
843 { }
844};
845
846U_BOOT_DRIVER(i2c_mvtwsi) = {
847 .name = "i2c_mvtwsi",
848 .id = UCLASS_I2C,
849 .of_match = mvtwsi_i2c_ids,
850 .probe = mvtwsi_i2c_probe,
851 .ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
852 .priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
853 .ops = &mvtwsi_i2c_ops,
854};
855#endif
856