LXR uboot/drivers/usb/musb-new/musb

   1/*
   2 * MUSB OTG driver DMA controller abstraction
   3 *
   4 * Copyright 2005 Mentor Graphics Corporation
   5 * Copyright (C) 2005-2006 by Texas Instruments
   6 * Copyright (C) 2006-2007 Nokia Corporation
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0
   9 */
  10
  11#ifndef __MUSB_DMA_H__
  12#define __MUSB_DMA_H__
  13
  14struct musb_hw_ep;
  15
  16/*
  17 * DMA Controller Abstraction
  18 *
  19 * DMA Controllers are abstracted to allow use of a variety of different
  20 * implementations of DMA, as allowed by the Inventra USB cores.  On the
  21 * host side, usbcore sets up the DMA mappings and flushes caches; on the
  22 * peripheral side, the gadget controller driver does.  Responsibilities
  23 * of a DMA controller driver include:
  24 *
  25 *  - Handling the details of moving multiple USB packets
  26 *    in cooperation with the Inventra USB core, including especially
  27 *    the correct RX side treatment of short packets and buffer-full
  28 *    states (both of which terminate transfers).
  29 *
  30 *  - Knowing the correlation between dma channels and the
  31 *    Inventra core's local endpoint resources and data direction.
  32 *
  33 *  - Maintaining a list of allocated/available channels.
  34 *
  35 *  - Updating channel status on interrupts,
  36 *    whether shared with the Inventra core or separate.
  37 */
  38
  39#define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  40
  41#ifndef CONFIG_USB_MUSB_PIO_ONLY
  42#define is_dma_capable()        (1)
  43#else
  44#define is_dma_capable()        (0)
  45#endif
  46
  47#ifdef CONFIG_USB_TI_CPPI_DMA
  48#define is_cppi_enabled()       1
  49#else
  50#define is_cppi_enabled()       0
  51#endif
  52
  53#ifdef CONFIG_USB_TUSB_OMAP_DMA
  54#define tusb_dma_omap()                 1
  55#else
  56#define tusb_dma_omap()                 0
  57#endif
  58
  59/*
  60 * DMA channel status ... updated by the dma controller driver whenever that
  61 * status changes, and protected by the overall controller spinlock.
  62 */
  63enum dma_channel_status {
  64        /* unallocated */
  65        MUSB_DMA_STATUS_UNKNOWN,
  66        /* allocated ... but not busy, no errors */
  67        MUSB_DMA_STATUS_FREE,
  68        /* busy ... transactions are active */
  69        MUSB_DMA_STATUS_BUSY,
  70        /* transaction(s) aborted due to ... dma or memory bus error */
  71        MUSB_DMA_STATUS_BUS_ABORT,
  72        /* transaction(s) aborted due to ... core error or USB fault */
  73        MUSB_DMA_STATUS_CORE_ABORT
  74};
  75
  76struct dma_controller;
  77
  78/**
  79 * struct dma_channel - A DMA channel.
  80 * @private_data: channel-private data
  81 * @max_len: the maximum number of bytes the channel can move in one
  82 *      transaction (typically representing many USB maximum-sized packets)
  83 * @actual_len: how many bytes have been transferred
  84 * @status: current channel status (updated e.g. on interrupt)
  85 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
  86 *
  87 * channels are associated with an endpoint for the duration of at least
  88 * one usb transfer.
  89 */
  90struct dma_channel {
  91        void                    *private_data;
  92        /* FIXME not void* private_data, but a dma_controller * */
  93        size_t                  max_len;
  94        size_t                  actual_len;
  95        enum dma_channel_status status;
  96        bool                    desired_mode;
  97};
  98
  99/*
 100 * dma_channel_status - return status of dma channel
 101 * @c: the channel
 102 *
 103 * Returns the software's view of the channel status.  If that status is BUSY
 104 * then it's possible that the hardware has completed (or aborted) a transfer,
 105 * so the driver needs to update that status.
 106 */
 107static inline enum dma_channel_status
 108dma_channel_status(struct dma_channel *c)
 109{
 110        return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
 111}
 112
 113/**
 114 * struct dma_controller - A DMA Controller.
 115 * @start: call this to start a DMA controller;
 116 *      return 0 on success, else negative errno
 117 * @stop: call this to stop a DMA controller
 118 *      return 0 on success, else negative errno
 119 * @channel_alloc: call this to allocate a DMA channel
 120 * @channel_release: call this to release a DMA channel
 121 * @channel_abort: call this to abort a pending DMA transaction,
 122 *      returning it to FREE (but allocated) state
 123 *
 124 * Controllers manage dma channels.
 125 */
 126struct dma_controller {
 127        int                     (*start)(struct dma_controller *);
 128        int                     (*stop)(struct dma_controller *);
 129        struct dma_channel      *(*channel_alloc)(struct dma_controller *,
 130                                        struct musb_hw_ep *, u8 is_tx);
 131        void                    (*channel_release)(struct dma_channel *);
 132        int                     (*channel_program)(struct dma_channel *channel,
 133                                                        u16 maxpacket, u8 mode,
 134                                                        dma_addr_t dma_addr,
 135                                                        u32 length);
 136        int                     (*channel_abort)(struct dma_channel *);
 137        int                     (*is_compatible)(struct dma_channel *channel,
 138                                                        u16 maxpacket,
 139                                                        void *buf, u32 length);
 140};
 141
 142/* called after channel_program(), may indicate a fault */
 143extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
 144
 145
 146extern struct dma_controller *__init
 147dma_controller_create(struct musb *, void __iomem *);
 148
 149extern void dma_controller_destroy(struct dma_controller *);
 150
 151#endif  /* __MUSB_DMA_H__ */
 152