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11#ifndef __CONFIG_CM_FX6_H
12#define __CONFIG_CM_FX6_H
13
14#include "mx6_common.h"
15
16
17#define CONFIG_SYS_LITTLE_ENDIAN
18#define CONFIG_MACH_TYPE 4273
19
20
21#define CONFIG_SYS_FSL_USDHC_NUM 3
22#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
23
24
25#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
26#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
27#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
28#define CONFIG_NR_DRAM_BANKS 2
29#define CONFIG_SYS_MEMTEST_START 0x10000000
30#define CONFIG_SYS_MEMTEST_END 0x10010000
31#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
32#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
33#define CONFIG_SYS_INIT_SP_OFFSET \
34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35#define CONFIG_SYS_INIT_SP_ADDR \
36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
37
38
39#define CONFIG_MXC_UART
40#define CONFIG_MXC_UART_BASE UART4_BASE
41#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
42
43
44#define CONFIG_SF_DEFAULT_BUS 0
45#define CONFIG_SF_DEFAULT_CS 0
46#define CONFIG_SF_DEFAULT_SPEED 25000000
47#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
48
49
50#ifndef CONFIG_SPL_BUILD
51#define CONFIG_MTD_DEVICE
52#define CONFIG_MTD_PARTITIONS
53#define CONFIG_SPI_FLASH_MTD
54#endif
55
56#define MTDIDS_DEFAULT "nor0=spi0.0"
57#define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \
58 "768k(uboot)," \
59 "256k(uboot-environment)," \
60 "-(reserved)"
61
62
63#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
64#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
65#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
66#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
67#define CONFIG_ENV_SECT_SIZE (64 * 1024)
68#define CONFIG_ENV_SIZE (8 * 1024)
69#define CONFIG_ENV_OFFSET (768 * 1024)
70
71#define CONFIG_EXTRA_ENV_SETTINGS \
72 "stdin=serial,usbkbd\0" \
73 "stdout=serial,vga\0" \
74 "stderr=serial,vga\0" \
75 "panel=HDMI\0" \
76 "autoload=no\0" \
77 "uImage=uImage-cm-fx6\0" \
78 "zImage=zImage-cm-fx6\0" \
79 "kernel=uImage-cm-fx6\0" \
80 "script=boot.scr\0" \
81 "dtb=cm-fx6.dtb\0" \
82 "bootm_low=18000000\0" \
83 "loadaddr=0x10800000\0" \
84 "fdtaddr=0x11000000\0" \
85 "console=ttymxc3,115200\0" \
86 "ethprime=FEC0\0" \
87 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
88 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
89 "doboot=bootm ${loadaddr}\0" \
90 "doloadfdt=false\0" \
91 "mtdids=" MTDIDS_DEFAULT "\0" \
92 "mtdparts=" MTDPARTS_DEFAULT "\0" \
93 "setboottypez=setenv kernel ${zImage};" \
94 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
95 "setenv doloadfdt true;\0" \
96 "setboottypem=setenv kernel ${uImage};" \
97 "setenv doboot bootm ${loadaddr};" \
98 "setenv doloadfdt false;\0"\
99 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
100 "sataroot=/dev/sda2 rw rootwait\0" \
101 "nandroot=/dev/mtdblock4 rw\0" \
102 "nandrootfstype=ubifs\0" \
103 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
104 "${video} ${extrabootargs}\0" \
105 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
106 "${video} ${extrabootargs}\0" \
107 "nandargs=setenv bootargs console=${console} " \
108 "root=${nandroot} " \
109 "rootfstype=${nandrootfstype} " \
110 "${video} ${extrabootargs}\0" \
111 "nandboot=if run nandloadkernel; then " \
112 "run nandloadfdt;" \
113 "run setboottypem;" \
114 "run storagebootcmd;" \
115 "run setboottypez;" \
116 "run storagebootcmd;" \
117 "fi;\0" \
118 "run_eboot=echo Starting EBOOT ...; "\
119 "mmc dev 2 && " \
120 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
121 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
122 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
123 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
124 "bootscript=echo Running bootscript from ${storagetype} ...;" \
125 "source ${loadaddr};\0" \
126 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
127 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
128 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
129 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
130 "setupnandboot=setenv storagetype nand;\0" \
131 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
132 "storagebootcmd=echo Booting from ${storagetype} ...;" \
133 "run ${storagetype}args; run doboot;\0" \
134 "trybootk=if run loadkernel; then " \
135 "if ${doloadfdt}; then " \
136 "run loadfdt;" \
137 "fi;" \
138 "run storagebootcmd;" \
139 "fi;\0" \
140 "trybootsmz=if run loadscript; then " \
141 "run bootscript;" \
142 "fi;" \
143 "run setboottypem;" \
144 "run trybootk;" \
145 "run setboottypez;" \
146 "run trybootk;\0"
147
148#define CONFIG_BOOTCOMMAND \
149 "run setupmmcboot;" \
150 "mmc dev ${storagedev};" \
151 "if mmc rescan; then " \
152 "run trybootsmz;" \
153 "fi;" \
154 "run setupusbboot;" \
155 "if usb start; then "\
156 "if run loadscript; then " \
157 "run bootscript;" \
158 "fi;" \
159 "fi;" \
160 "run setupsataboot;" \
161 "if sata init; then " \
162 "run trybootsmz;" \
163 "fi;" \
164 "run setupnandboot;" \
165 "run nandboot;"
166
167#define CONFIG_PREBOOT "usb start;sf probe"
168
169
170#define CONFIG_SPI
171#define CONFIG_MXC_SPI
172
173
174#ifndef CONFIG_SPL_BUILD
175#define CONFIG_SYS_NAND_BASE 0x40000000
176#define CONFIG_SYS_NAND_MAX_CHIPS 1
177#define CONFIG_SYS_MAX_NAND_DEVICE 1
178#define CONFIG_NAND_MXS
179#define CONFIG_SYS_NAND_ONFI_DETECTION
180
181#define CONFIG_APBH_DMA
182#define CONFIG_APBH_DMA_BURST
183#define CONFIG_APBH_DMA_BURST8
184#endif
185
186
187#define CONFIG_FEC_MXC
188#define CONFIG_FEC_MXC_PHYADDR 0
189#define CONFIG_FEC_XCV_TYPE RGMII
190#define IMX_FEC_BASE ENET_BASE_ADDR
191#define CONFIG_PHY_ATHEROS
192#define CONFIG_MII
193#define CONFIG_ETHPRIME "FEC0"
194#define CONFIG_ARP_TIMEOUT 200UL
195#define CONFIG_NET_RETRY_COUNT 5
196
197
198#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
199#define CONFIG_MXC_USB_FLAGS 0
200#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
201#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
202
203
204#define CONFIG_SYS_I2C
205#define CONFIG_SYS_I2C_MXC
206#define CONFIG_SYS_I2C_MXC_I2C1
207#define CONFIG_SYS_I2C_MXC_I2C2
208#define CONFIG_SYS_I2C_MXC_I2C3
209#define CONFIG_SYS_I2C_SPEED 100000
210#define CONFIG_SYS_MXC_I2C3_SPEED 400000
211
212#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
213#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
214#define CONFIG_SYS_I2C_EEPROM_BUS 2
215
216
217#define CONFIG_SYS_SATA_MAX_DEVICE 1
218#define CONFIG_LIBATA
219#define CONFIG_LBA48
220#define CONFIG_DWC_AHSATA
221#define CONFIG_DWC_AHSATA_PORT_ID 0
222#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
223
224
225#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
226#define CONFIG_SERIAL_TAG
227
228
229#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
230#define CONFIG_MISC_INIT_R
231
232
233#include "imx6_spl.h"
234#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
235#define CONFIG_SPL_SPI_LOAD
236
237
238#define CONFIG_VIDEO_IPUV3
239#define CONFIG_IPUV3_CLK 260000000
240#define CONFIG_IMX_HDMI
241
242#define CONFIG_SPLASH_SCREEN
243#define CONFIG_SPLASH_SOURCE
244#define CONFIG_VIDEO_BMP_RLE8
245
246#define CONFIG_VIDEO_LOGO
247#define CONFIG_VIDEO_BMP_LOGO
248
249
250#define CONFIG_ENV_EEPROM_IS_ON_I2C
251#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
252#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
253#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
254#define CONFIG_SYS_EEPROM_SIZE 256
255
256#endif
257
