uboot/include/configs/ecovec.h
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   1/*
   2 * Configuation settings for the Renesas Solutions ECOVEC board
   3 *
   4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
   5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
   6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#ifndef __ECOVEC_H
  12#define __ECOVEC_H
  13
  14/*
  15 *  Address      Interface        BusWidth
  16 *-----------------------------------------
  17 *  0x0000_0000  U-Boot           16bit
  18 *  0x0004_0000  Linux romImage   16bit
  19 *  0x0014_0000  MTD for Linux    16bit
  20 *  0x0400_0000  Internal I/O     16/32bit
  21 *  0x0800_0000  DRAM             32bit
  22 *  0x1800_0000  MFI              16bit
  23 */
  24
  25#define CONFIG_CPU_SH7724       1
  26#define CONFIG_ECOVEC           1
  27
  28#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
  29#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
  30
  31#define CONFIG_DISPLAY_BOARDINFO
  32#undef  CONFIG_SHOW_BOOT_PROGRESS
  33
  34/* I2C */
  35#define CONFIG_SYS_I2C
  36#define CONFIG_SYS_I2C_SH
  37#define CONFIG_SYS_I2C_SLAVE    0x7F
  38#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
  39#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
  40#define CONFIG_SYS_I2C_SH_SPEED0        100000
  41#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
  42#define CONFIG_SYS_I2C_SH_SPEED1        100000
  43#define CONFIG_SH_I2C_DATA_HIGH 4
  44#define CONFIG_SH_I2C_DATA_LOW  5
  45#define CONFIG_SH_I2C_CLOCK     41666666
  46
  47/* Ether */
  48#define CONFIG_SH_ETHER 1
  49#define CONFIG_SH_ETHER_USE_PORT (0)
  50#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
  51#define CONFIG_PHY_SMSC 1
  52#define CONFIG_BITBANGMII
  53#define CONFIG_BITBANGMII_MULTI
  54#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
  55
  56/* USB / R8A66597 */
  57#define CONFIG_USB_R8A66597_HCD
  58#define CONFIG_R8A66597_BASE_ADDR   0xA4D80000
  59#define CONFIG_R8A66597_XTAL        0x0000  /* 12MHz */
  60#define CONFIG_R8A66597_LDRV        0x8000  /* 3.3V */
  61#define CONFIG_R8A66597_ENDIAN      0x0000  /* little */
  62#define CONFIG_SUPERH_ON_CHIP_R8A66597
  63
  64/* undef to save memory */
  65#define CONFIG_SYS_LONGHELP
  66/* Monitor Command Prompt */
  67/* Buffer size for Console output */
  68#define CONFIG_SYS_PBSIZE               256
  69/* List of legal baudrate settings for this board */
  70#define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  71
  72/* SCIF */
  73#define CONFIG_SCIF             1
  74#define CONFIG_CONS_SCIF0       1
  75
  76/* Suppress display of console information at boot */
  77
  78/* SDRAM */
  79#define CONFIG_SYS_SDRAM_BASE   (0x88000000)
  80#define CONFIG_SYS_SDRAM_SIZE   (256 * 1024 * 1024)
  81#define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  82
  83#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  84#define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
  85/* Enable alternate, more extensive, memory test */
  86#undef  CONFIG_SYS_ALT_MEMTEST
  87/* Scratch address used by the alternate memory test */
  88#undef  CONFIG_SYS_MEMTEST_SCRATCH
  89
  90/* Enable temporary baudrate change while serial download */
  91#undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  92
  93/* FLASH */
  94#define CONFIG_FLASH_CFI_DRIVER 1
  95#define CONFIG_SYS_FLASH_CFI
  96#undef  CONFIG_SYS_FLASH_QUIET_TEST
  97#define CONFIG_SYS_FLASH_EMPTY_INFO
  98#define CONFIG_SYS_FLASH_BASE   (0xA0000000)
  99#define CONFIG_SYS_MAX_FLASH_SECT       512
 100
 101/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
 102#define CONFIG_SYS_MAX_FLASH_BANKS      1
 103#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
 104
 105/* Timeout for Flash erase operations (in ms) */
 106#define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
 107/* Timeout for Flash write operations (in ms) */
 108#define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
 109/* Timeout for Flash set sector lock bit operations (in ms) */
 110#define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
 111/* Timeout for Flash clear lock bit operations (in ms) */
 112#define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
 113
 114/*
 115 * Use hardware flash sectors protection instead
 116 * of U-Boot software protection
 117 */
 118#undef  CONFIG_SYS_FLASH_PROTECTION
 119#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
 120
 121/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
 122#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
 123/* Monitor size */
 124#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
 125/* Size of DRAM reserved for malloc() use */
 126#define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
 127#define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
 128
 129/* ENV setting */
 130#define CONFIG_ENV_OVERWRITE    1
 131#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 132#define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
 133#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 134/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
 135#define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
 136#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
 137
 138/* Board Clock */
 139#define CONFIG_SYS_CLK_FREQ 41666666
 140#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 141#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 142#define CONFIG_SYS_TMU_CLK_DIV      4
 143
 144#endif  /* __ECOVEC_H */
 145