LXR uboot/drivers/mtd/spi/sf

   1/*
   2 * SPI flash internal definitions
   3 *
   4 * Copyright (C) 2008 Atmel Corporation
   5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   6 *
   7 * SPDX-License-Identifier:     GPL-2.0+
   8 */
   9
  10#ifndef _SF_INTERNAL_H_
  11#define _SF_INTERNAL_H_
  12
  13#include <linux/types.h>
  14#include <linux/compiler.h>
  15
  16/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
  17enum spi_dual_flash {
  18        SF_SINGLE_FLASH = 0,
  19        SF_DUAL_STACKED_FLASH   = BIT(0),
  20        SF_DUAL_PARALLEL_FLASH  = BIT(1),
  21};
  22
  23enum spi_nor_option_flags {
  24        SNOR_F_SST_WR           = BIT(0),
  25        SNOR_F_USE_FSR          = BIT(1),
  26        SNOR_F_USE_UPAGE        = BIT(3),
  27};
  28
  29#define SPI_FLASH_3B_ADDR_LEN           3
  30#define SPI_FLASH_CMD_LEN               (1 + SPI_FLASH_3B_ADDR_LEN)
  31#define SPI_FLASH_16MB_BOUN             0x1000000
  32
  33/* CFI Manufacture ID's */
  34#define SPI_FLASH_CFI_MFR_SPANSION      0x01
  35#define SPI_FLASH_CFI_MFR_STMICRO       0x20
  36#define SPI_FLASH_CFI_MFR_MACRONIX      0xc2
  37#define SPI_FLASH_CFI_MFR_SST           0xbf
  38#define SPI_FLASH_CFI_MFR_WINBOND       0xef
  39#define SPI_FLASH_CFI_MFR_ATMEL         0x1f
  40
  41/* Erase commands */
  42#define CMD_ERASE_4K                    0x20
  43#define CMD_ERASE_CHIP                  0xc7
  44#define CMD_ERASE_64K                   0xd8
  45
  46/* Write commands */
  47#define CMD_WRITE_STATUS                0x01
  48#define CMD_PAGE_PROGRAM                0x02
  49#define CMD_WRITE_DISABLE               0x04
  50#define CMD_WRITE_ENABLE                0x06
  51#define CMD_QUAD_PAGE_PROGRAM           0x32
  52
  53/* Read commands */
  54#define CMD_READ_ARRAY_SLOW             0x03
  55#define CMD_READ_ARRAY_FAST             0x0b
  56#define CMD_READ_DUAL_OUTPUT_FAST       0x3b
  57#define CMD_READ_DUAL_IO_FAST           0xbb
  58#define CMD_READ_QUAD_OUTPUT_FAST       0x6b
  59#define CMD_READ_QUAD_IO_FAST           0xeb
  60#define CMD_READ_ID                     0x9f
  61#define CMD_READ_STATUS                 0x05
  62#define CMD_READ_STATUS1                0x35
  63#define CMD_READ_CONFIG                 0x35
  64#define CMD_FLAG_STATUS                 0x70
  65
  66/* Bank addr access commands */
  67#ifdef CONFIG_SPI_FLASH_BAR
  68# define CMD_BANKADDR_BRWR              0x17
  69# define CMD_BANKADDR_BRRD              0x16
  70# define CMD_EXTNADDR_WREAR             0xC5
  71# define CMD_EXTNADDR_RDEAR             0xC8
  72#endif
  73
  74/* Common status */
  75#define STATUS_WIP                      BIT(0)
  76#define STATUS_QEB_WINSPAN              BIT(1)
  77#define STATUS_QEB_MXIC                 BIT(6)
  78#define STATUS_PEC                      BIT(7)
  79#define SR_BP0                          BIT(2)  /* Block protect 0 */
  80#define SR_BP1                          BIT(3)  /* Block protect 1 */
  81#define SR_BP2                          BIT(4)  /* Block protect 2 */
  82
  83/* Flash timeout values */
  84#define SPI_FLASH_PROG_TIMEOUT          (2 * CONFIG_SYS_HZ)
  85#define SPI_FLASH_PAGE_ERASE_TIMEOUT    (5 * CONFIG_SYS_HZ)
  86#define SPI_FLASH_SECTOR_ERASE_TIMEOUT  (10 * CONFIG_SYS_HZ)
  87
  88/* SST specific */
  89#ifdef CONFIG_SPI_FLASH_SST
  90# define CMD_SST_BP             0x02    /* Byte Program */
  91# define CMD_SST_AAI_WP         0xAD    /* Auto Address Incr Word Program */
  92
  93int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
  94                const void *buf);
  95int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
  96                const void *buf);
  97#endif
  98
  99#define JEDEC_MFR(info)         ((info)->id[0])
 100#define JEDEC_ID(info)          (((info)->id[1]) << 8 | ((info)->id[2]))
 101#define JEDEC_EXT(info)         (((info)->id[3]) << 8 | ((info)->id[4]))
 102#define SPI_FLASH_MAX_ID_LEN    6
 103
 104struct spi_flash_info {
 105        /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
 106        const char      *name;
 107
 108        /*
 109         * This array stores the ID bytes.
 110         * The first three bytes are the JEDIC ID.
 111         * JEDEC ID zero means "no ID" (mostly older chips).
 112         */
 113        u8              id[SPI_FLASH_MAX_ID_LEN];
 114        u8              id_len;
 115
 116        /*
 117         * The size listed here is what works with SPINOR_OP_SE, which isn't
 118         * necessarily called a "sector" by the vendor.
 119         */
 120        u32             sector_size;
 121        u32             n_sectors;
 122
 123        u16             page_size;
 124
 125        u16             flags;
 126#define SECT_4K                 BIT(0)  /* CMD_ERASE_4K works uniformly */
 127#define E_FSR                   BIT(1)  /* use flag status register for */
 128#define SST_WR                  BIT(2)  /* use SST byte/word programming */
 129#define WR_QPP                  BIT(3)  /* use Quad Page Program */
 130#define RD_QUAD                 BIT(4)  /* use Quad Read */
 131#define RD_DUAL                 BIT(5)  /* use Dual Read */
 132#define RD_QUADIO               BIT(6)  /* use Quad IO Read */
 133#define RD_DUALIO               BIT(7)  /* use Dual IO Read */
 134#define RD_FULL                 (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
 135};
 136
 137extern const struct spi_flash_info spi_flash_ids[];
 138
 139/* Send a single-byte command to the device and read the response */
 140int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
 141
 142/*
 143 * Send a multi-byte command to the device and read the response. Used
 144 * for flash array reads, etc.
 145 */
 146int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
 147                size_t cmd_len, void *data, size_t data_len);
 148
 149/*
 150 * Send a multi-byte command to the device followed by (optional)
 151 * data. Used for programming the flash array, etc.
 152 */
 153int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 154                const void *data, size_t data_len);
 155
 156
 157/* Flash erase(sectors) operation, support all possible erase commands */
 158int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 159
 160/* Lock stmicro spi flash region */
 161int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
 162
 163/* Unlock stmicro spi flash region */
 164int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
 165
 166/* Check if a stmicro spi flash region is completely locked */
 167int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
 168
 169/* Enable writing on the SPI flash */
 170static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
 171{
 172        return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
 173}
 174
 175/* Disable writing on the SPI flash */
 176static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
 177{
 178        return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
 179}
 180
 181/*
 182 * Used for spi_flash write operation
 183 * - SPI claim
 184 * - spi_flash_cmd_write_enable
 185 * - spi_flash_cmd_write
 186 * - spi_flash_wait_till_ready
 187 * - SPI release
 188 */
 189int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 190                size_t cmd_len, const void *buf, size_t buf_len);
 191
 192/*
 193 * Flash write operation, support all possible write commands.
 194 * Write the requested data out breaking it up into multiple write
 195 * commands as needed per the write size.
 196 */
 197int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 198                size_t len, const void *buf);
 199
 200/*
 201 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
 202 * bus. Used as common part of the ->read() operation.
 203 */
 204int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 205                size_t cmd_len, void *data, size_t data_len);
 206
 207/* Flash read operation, support all possible read commands */
 208int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 209                size_t len, void *data);
 210
 211#ifdef CONFIG_SPI_FLASH_MTD
 212int spi_flash_mtd_register(struct spi_flash *flash);
 213void spi_flash_mtd_unregister(void);
 214#endif
 215
 216/**
 217 * spi_flash_scan - scan the SPI FLASH
 218 * @flash:      the spi flash structure
 219 *
 220 * The drivers can use this fuction to scan the SPI FLASH.
 221 * In the scanning, it will try to get all the necessary information to
 222 * fill the spi_flash{}.
 223 *
 224 * Return: 0 for success, others for failure.
 225 */
 226int spi_flash_scan(struct spi_flash *flash);
 227
 228#endif /* _SF_INTERNAL_H_ */
 229