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11#ifndef __CONFIG_TRATS2_H
12#define __CONFIG_TRATS2_H
13
14#include <configs/exynos4-common.h>
15
16#define CONFIG_TIZEN
17
18#define CONFIG_SYS_L2CACHE_OFF
19#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
23
24
25#define CONFIG_NR_DRAM_BANKS 4
26#define CONFIG_SYS_SDRAM_BASE 0x40000000
27#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
28#define SDRAM_BANK_SIZE (256 << 20)
29
30#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33
34#define CONFIG_SYS_TEXT_BASE 0x43e00000
35
36
37#define CONFIG_SERIAL2
38
39
40
41#define CONFIG_BOOTCOMMAND "run autoboot"
42#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
43
44#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
45 - GENERATED_GBL_DATA_SIZE)
46
47#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)
48
49#define CONFIG_SYS_MONITOR_BASE 0x00000000
50
51#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
52#define CONFIG_ENV_SIZE 4096
53#define CONFIG_ENV_OFFSET ((32 - 4) << 10)
54
55#define CONFIG_ENV_OVERWRITE
56
57#define CONFIG_ENV_VARS_UBOOT_CONFIG
58#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
59
60
61#define PARTS_CSA "csa-mmc"
62#define PARTS_BOOT "boot"
63#define PARTS_QBOOT "qboot"
64#define PARTS_CSC "csc"
65#define PARTS_ROOT "platform"
66#define PARTS_DATA "data"
67#define PARTS_UMS "ums"
68
69#define PARTS_DEFAULT \
70 "uuid_disk=${uuid_gpt_disk};" \
71 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
72 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
73 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
74 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
75 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
76 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
77 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
78
79#define CONFIG_DFU_ALT \
80 "u-boot raw 0x80 0x800;" \
81 "/uImage ext4 0 2;" \
82 "/modem.bin ext4 0 2;" \
83 "/exynos4412-trats2.dtb ext4 0 2;" \
84 ""PARTS_CSA" part 0 1;" \
85 ""PARTS_BOOT" part 0 2;" \
86 ""PARTS_QBOOT" part 0 3;" \
87 ""PARTS_CSC" part 0 4;" \
88 ""PARTS_ROOT" part 0 5;" \
89 ""PARTS_DATA" part 0 6;" \
90 ""PARTS_UMS" part 0 7;" \
91 "params.bin raw 0x38 0x8;" \
92 "/Image.itb ext4 0 2\0"
93
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "bootk=" \
96 "run loaduimage;" \
97 "if run loaddtb; then " \
98 "bootm 0x40007FC0 - ${fdtaddr};" \
99 "fi;" \
100 "bootm 0x40007FC0;\0" \
101 "updatebackup=" \
102 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
103 " mmc dev 0 0\0" \
104 "updatebootb=" \
105 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
106 "mmcboot=" \
107 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
108 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
109 "run bootk\0" \
110 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
111 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
112 "verify=n\0" \
113 "rootfstype=ext4\0" \
114 "console=" CONFIG_DEFAULT_CONSOLE \
115 "kernelname=uImage\0" \
116 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
117 "${kernelname}\0" \
118 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
119 "${fdtfile}\0" \
120 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
121 "mmcbootpart=2\0" \
122 "mmcrootpart=5\0" \
123 "opts=always_resume=1\0" \
124 "partitions=" PARTS_DEFAULT \
125 "dfu_alt_info=" CONFIG_DFU_ALT \
126 "uartpath=ap\0" \
127 "usbpath=ap\0" \
128 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
129 "consoleoff=set console console=ram; save; reset\0" \
130 "spladdr=0x40000100\0" \
131 "splsize=0x200\0" \
132 "splfile=falcon.bin\0" \
133 "spl_export=" \
134 "setexpr spl_imgsize ${splsize} + 8 ;" \
135 "setenv spl_imgsize 0x${spl_imgsize};" \
136 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
137 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
138 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
139 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
140 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
141 "spl export atags 0x40007FC0;" \
142 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
143 "mw.l ${spl_addr_tmp} ${splsize};" \
144 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
145 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
146 "setenv spl_imgsize;" \
147 "setenv spl_imgaddr;" \
148 "setenv spl_addr_tmp;\0" \
149 CONFIG_EXTRA_ENV_ITB \
150 "fdtaddr=40800000\0" \
151
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153
154
155#define CONFIG_EXYNOS_ACE_SHA
156#define CONFIG_LIB_HW_RAND
157
158
159#define CONFIG_MISC_COMMON
160
161#define CONFIG_MISC_INIT_R
162
163
164#define CONFIG_LCD_MENU
165
166
167#ifndef __ASSEMBLY__
168
169#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
170#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
171#define KEY_PWR_STATUS_MASK (1 << 0)
172#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
173#define KEY_PWR_INTERRUPT_MASK (1 << 1)
174
175#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
176#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
177#endif
178
179
180#define LCD_BPP LCD_COLOR16
181
182
183#define CONFIG_BMP_16BPP
184#define CONFIG_FB_ADDR 0x52504000
185#define CONFIG_EXYNOS_MIPI_DSIM
186#define CONFIG_VIDEO_BMP_GZIP
187#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
188
189#endif
190
