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10#include <asm-offsets.h>
11#include <config.h>
12#include <asm/macro.h>
13#include <asm/system.h>
14#include <linux/linkage.h>
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24
25.pushsection .text.__asm_dcache_level, "ax"
26ENTRY(__asm_dcache_level)
27 lsl x12, x0,
28 msr csselr_el1, x12
29 isb
30 mrs x6, ccsidr_el1
31 and x2, x6,
32 add x2, x2,
33 mov x3,
34 and x3, x3, x6, lsr
35 clz w5, w3
36 mov x4,
37 and x4, x4, x6, lsr
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43
44loop_set:
45 mov x6, x3
46loop_way:
47 lsl x7, x6, x5
48 orr x9, x12, x7
49 lsl x7, x4, x2
50 orr x9, x9, x7
51 tbz w1,
52 dc isw, x9
53 b 2f
541: dc cisw, x9
552: subs x6, x6,
56 b.ge loop_way
57 subs x4, x4,
58 b.ge loop_set
59
60 ret
61ENDPROC(__asm_dcache_level)
62.popsection
63
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70
71.pushsection .text.__asm_dcache_all, "ax"
72ENTRY(__asm_dcache_all)
73 mov x1, x0
74 dsb sy
75 mrs x10, clidr_el1
76 lsr x11, x10,
77 and x11, x11,
78 cbz x11, finished
79 mov x15, lr
80 mov x0,
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83
84
85
86loop_level:
87 lsl x12, x0,
88 add x12, x12, x0
89 lsr x12, x10, x12
90 and x12, x12,
91 cmp x12,
92 b.lt skip
93 bl __asm_dcache_level
94skip:
95 add x0, x0,
96 cmp x11, x0
97 b.gt loop_level
98
99 mov x0,
100 msr csselr_el1, x0
101 dsb sy
102 isb
103 mov lr, x15
104
105finished:
106 ret
107ENDPROC(__asm_dcache_all)
108.popsection
109
110.pushsection .text.__asm_flush_dcache_all, "ax"
111ENTRY(__asm_flush_dcache_all)
112 mov x0,
113 b __asm_dcache_all
114ENDPROC(__asm_flush_dcache_all)
115.popsection
116
117.pushsection .text.__asm_invalidate_dcache_all, "ax"
118ENTRY(__asm_invalidate_dcache_all)
119 mov x0,
120 b __asm_dcache_all
121ENDPROC(__asm_invalidate_dcache_all)
122.popsection
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131
132.pushsection .text.__asm_flush_dcache_range, "ax"
133ENTRY(__asm_flush_dcache_range)
134 mrs x3, ctr_el0
135 lsr x3, x3,
136 and x3, x3,
137 mov x2,
138 lsl x2, x2, x3
139
140
141 sub x3, x2,
142 bic x0, x0, x3
1431: dc civac, x0
144 add x0, x0, x2
145 cmp x0, x1
146 b.lo 1b
147 dsb sy
148 ret
149ENDPROC(__asm_flush_dcache_range)
150.popsection
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159.pushsection .text.__asm_invalidate_dcache_range, "ax"
160ENTRY(__asm_invalidate_dcache_range)
161 mrs x3, ctr_el0
162 ubfm x3, x3,
163 mov x2,
164 lsl x2, x2, x3
165
166
167 sub x3, x2,
168 bic x0, x0, x3
1691: dc ivac, x0
170 add x0, x0, x2
171 cmp x0, x1
172 b.lo 1b
173 dsb sy
174 ret
175ENDPROC(__asm_invalidate_dcache_range)
176.popsection
177
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182
183.pushsection .text.__asm_invalidate_icache_all, "ax"
184ENTRY(__asm_invalidate_icache_all)
185 ic ialluis
186 isb sy
187 ret
188ENDPROC(__asm_invalidate_icache_all)
189.popsection
190
191.pushsection .text.__asm_invalidate_l3_dcache, "ax"
192ENTRY(__asm_invalidate_l3_dcache)
193 mov x0,
194 ret
195ENDPROC(__asm_invalidate_l3_dcache)
196 .weak __asm_invalidate_l3_dcache
197.popsection
198
199.pushsection .text.__asm_flush_l3_dcache, "ax"
200ENTRY(__asm_flush_l3_dcache)
201 mov x0,
202 ret
203ENDPROC(__asm_flush_l3_dcache)
204 .weak __asm_flush_l3_dcache
205.popsection
206
207.pushsection .text.__asm_invalidate_l3_icache, "ax"
208ENTRY(__asm_invalidate_l3_icache)
209 mov x0,
210 ret
211ENDPROC(__asm_invalidate_l3_icache)
212 .weak __asm_invalidate_l3_icache
213.popsection
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220.pushsection .text.__asm_switch_ttbr, "ax"
221ENTRY(__asm_switch_ttbr)
222
223 switch_el x4, 3f, 2f, 1f
2243: mrs x2, sctlr_el3
225 b 0f
2262: mrs x2, sctlr_el2
227 b 0f
2281: mrs x2, sctlr_el1
2290:
230
231
232 movn x1,
233 and x1, x2, x1
234 switch_el x4, 3f, 2f, 1f
2353: msr sctlr_el3, x1
236 b 0f
2372: msr sctlr_el2, x1
238 b 0f
2391: msr sctlr_el1, x1
2400: isb
241
242
243 mov x3, x30
244 bl __asm_invalidate_tlb_all
245
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247
248
249 switch_el x4, 3f, 2f, 1f
2503: msr ttbr0_el3, x0
251 b 0f
2522: msr ttbr0_el2, x0
253 b 0f
2541: msr ttbr0_el1, x0
2550: isb
256
257
258 switch_el x4, 3f, 2f, 1f
2593: msr sctlr_el3, x2
260 b 0f
2612: msr sctlr_el2, x2
262 b 0f
2631: msr sctlr_el1, x2
2640: isb
265
266 ret x3
267ENDPROC(__asm_switch_ttbr)
268.popsection
269