LXR uboot/include/configs/zmx25.h

   1/*
   2 * (c) 2011 Graf-Syteco, Matthias Weisser
   3 * <weisserm@arcor.de>
   4 *
   5 * Configuation settings for the zmx25 board
   6 *
   7 * SPDX-License-Identifier:     GPL-2.0+
   8 */
   9
  10#ifndef __CONFIG_H
  11#define __CONFIG_H
  12
  13#include <asm/arch/imx-regs.h>
  14
  15#define CONFIG_SYS_TEXT_BASE            0xA0000000
  16
  17#define CONFIG_SYS_TIMER_RATE           32768
  18#define CONFIG_SYS_TIMER_COUNTER        \
  19        (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
  20
  21#define CONFIG_MACH_TYPE        MACH_TYPE_ZMX25
  22/*
  23 * Environment settings
  24 */
  25#define CONFIG_EXTRA_ENV_SETTINGS \
  26        "gs_fast_boot=setenv bootdelay 5\0" \
  27        "gs_slow_boot=setenv bootdelay 10\0" \
  28        "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
  29                "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
  30                "bootm 0x81000000; bootelf 0x81000000\0"
  31
  32#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  33#define CONFIG_SETUP_MEMORY_TAGS
  34#define CONFIG_INITRD_TAG
  35
  36/*
  37 * Hardware drivers
  38 */
  39
  40/*
  41 * GPIO
  42 */
  43#define CONFIG_MXC_GPIO
  44
  45/*
  46 * Serial
  47 */
  48#define CONFIG_MXC_UART
  49#define CONFIG_MXC_UART_BASE    UART2_BASE
  50#define CONFIG_CONS_INDEX       1       /* use UART2 for console */
  51
  52/*
  53 * Ethernet
  54 */
  55#define CONFIG_FEC_MXC
  56#define CONFIG_FEC_MXC_PHYADDR          0x00
  57#define CONFIG_MII
  58
  59/*
  60 * BOOTP options
  61 */
  62#define CONFIG_BOOTP_BOOTFILESIZE
  63#define CONFIG_BOOTP_BOOTPATH
  64#define CONFIG_BOOTP_GATEWAY
  65#define CONFIG_BOOTP_HOSTNAME
  66
  67/*
  68 * Command line configuration.
  69 */
  70
  71/*
  72 * Additional command
  73 */
  74
  75/*
  76 * USB
  77 */
  78#ifdef CONFIG_CMD_USB
  79#define CONFIG_USB_EHCI_MXC
  80#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  81#define CONFIG_MXC_USB_PORT     1
  82#define CONFIG_MXC_USB_PORTSC   MXC_EHCI_MODE_SERIAL
  83#define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
  84#define CONFIG_EHCI_IS_TDI
  85#define CONFIG_SUPPORT_VFAT
  86#endif /* CONFIG_CMD_USB */
  87
  88/* SDRAM */
  89#define CONFIG_NR_DRAM_BANKS    1
  90#define PHYS_SDRAM              0x80000000      /* start address of LPDDRRAM */
  91#define PHYS_SDRAM_SIZE         0x04000000      /* 64 megs */
  92
  93#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
  94#define CONFIG_SYS_INIT_SP_ADDR 0x78020000      /* end of internal SRAM */
  95
  96/*
  97 * FLASH and environment organization
  98 */
  99#define CONFIG_SYS_FLASH_BASE           0xA0000000
 100#define CONFIG_SYS_MAX_FLASH_BANKS      1
 101#define CONFIG_SYS_MAX_FLASH_SECT       256
 102
 103#define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x00040000)
 104#define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 105#define CONFIG_ENV_SIZE                 (128 * 1024)
 106
 107/*
 108 * CFI FLASH driver setup
 109 */
 110#define CONFIG_SYS_FLASH_CFI
 111#define CONFIG_FLASH_CFI_DRIVER
 112#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* ~10x faster */
 113
 114#define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SDRAM_BASE
 115
 116#define CONFIG_SYS_MEMTEST_START        (PHYS_SDRAM + (512*1024))
 117#define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM + PHYS_SDRAM_SIZE)
 118
 119#define CONFIG_SYS_LONGHELP
 120#define CONFIG_CMDLINE_EDITING
 121
 122#define CONFIG_PREBOOT  ""
 123
 124
 125/*
 126 * Size of malloc() pool
 127 */
 128#define CONFIG_SYS_MALLOC_LEN           (0x400000 - 0x8000)
 129
 130#endif  /* __CONFIG_H */
 131