LXR uboot/arch/arm/include/asm/arch-mx5/clock.h

   1/*
   2 * (C) Copyright 2009
   3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef __ASM_ARCH_CLOCK_H
   9#define __ASM_ARCH_CLOCK_H
  10
  11#include <common.h>
  12
  13#ifdef CONFIG_SYS_MX5_HCLK
  14#define MXC_HCLK        CONFIG_SYS_MX5_HCLK
  15#else
  16#define MXC_HCLK        24000000
  17#endif
  18
  19#ifdef CONFIG_SYS_MX5_CLK32
  20#define MXC_CLK32       CONFIG_SYS_MX5_CLK32
  21#else
  22#define MXC_CLK32       32768
  23#endif
  24
  25enum mxc_clock {
  26        MXC_ARM_CLK = 0,
  27        MXC_AHB_CLK,
  28        MXC_IPG_CLK,
  29        MXC_IPG_PERCLK,
  30        MXC_UART_CLK,
  31        MXC_CSPI_CLK,
  32        MXC_ESDHC_CLK,
  33        MXC_ESDHC2_CLK,
  34        MXC_ESDHC3_CLK,
  35        MXC_ESDHC4_CLK,
  36        MXC_FEC_CLK,
  37        MXC_SATA_CLK,
  38        MXC_DDR_CLK,
  39        MXC_NFC_CLK,
  40        MXC_PERIPH_CLK,
  41        MXC_I2C_CLK,
  42};
  43
  44u32 imx_get_uartclk(void);
  45u32 imx_get_fecclk(void);
  46unsigned int mxc_get_clock(enum mxc_clock clk);
  47int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
  48void set_usb_phy_clk(void);
  49void enable_usb_phy1_clk(bool enable);
  50void enable_usb_phy2_clk(bool enable);
  51void set_usboh3_clk(void);
  52void enable_usboh3_clk(bool enable);
  53void mxc_set_sata_internal_clock(void);
  54int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
  55void enable_nfc_clk(unsigned char enable);
  56void enable_efuse_prog_supply(bool enable);
  57
  58#endif /* __ASM_ARCH_CLOCK_H */
  59