1/* 2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#ifndef _X86_ARCH_TNC_H_ 8#define _X86_ARCH_TNC_H_ 9 10/* IGD Function Disable Register */ 11#define IGD_FD 0xc4 12#define FUNC_DISABLE 0x00000001 13 14/* Memory BAR Enable */ 15#define MEM_BAR_EN 0x00000001 16 17/* LPC PCI Configuration Registers */ 18#define LPC_RCBA 0xf0 19 20/* Root Complex Register Block */ 21struct tnc_rcba { 22 u32 rctl; 23 u32 esd; 24 u32 rsvd1[2]; 25 u32 hdd; 26 u32 rsvd2; 27 u32 hdba; 28 u32 rsvd3[3129]; 29 u32 d31ip; 30 u32 rsvd4[3]; 31 u32 d27ip; 32 u32 rsvd5; 33 u32 d02ip; 34 u32 rsvd6; 35 u32 d26ip; 36 u32 d25ip; 37 u32 d24ip; 38 u32 d23ip; 39 u32 d03ip; 40 u32 rsvd7[3]; 41 u16 d31ir; 42 u16 rsvd8[3]; 43 u16 d27ir; 44 u16 d26ir; 45 u16 d25ir; 46 u16 d24ir; 47 u16 d23ir; 48 u16 rsvd9[7]; 49 u16 d02ir; 50 u16 d03ir; 51}; 52 53#endif /* _X86_ARCH_TNC_H_ */ 54