1/* 2 * Copyright (C) 2011 Andes Technology Corporation 3 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 4 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#include <asm/mach-types.h> 10#include <common.h> 11#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) 12#include <netdev.h> 13#endif 14#include <linux/io.h> 15#include <faraday/ftsdc010.h> 16#include <faraday/ftsmc020.h> 17 18DECLARE_GLOBAL_DATA_PTR; 19 20/* 21 * Miscellaneous platform dependent initializations 22 */ 23int board_init(void) 24{ 25 /* 26 * refer to BOOT_PARAMETER_PA_BASE within 27 * "linux/arch/nds32/include/asm/misc_spec.h" 28 */ 29 printf("Board: %s\n" , CONFIG_SYS_BOARD); 30 gd->bd->bi_arch_number = MACH_TYPE_ADPAE3XX; 31 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; 32 return 0; 33} 34 35int dram_init(void) 36{ 37 unsigned long sdram_base = PHYS_SDRAM_0; 38 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; 39 unsigned long actual_size; 40 actual_size = get_ram_size((void *)sdram_base, expected_size); 41 gd->ram_size = actual_size; 42 if (expected_size != actual_size) { 43 printf("Warning: Only %lu of %lu MiB SDRAM is working\n", 44 actual_size >> 20, expected_size >> 20); 45 } 46 47 return 0; 48} 49 50int dram_init_banksize(void) 51{ 52 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; 53 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; 54 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; 55 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; 56 57 return 0; 58} 59 60#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) 61int board_eth_init(bd_t *bd) 62{ 63 return ftmac100_initialize(bd); 64} 65#endif 66 67ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) 68{ 69 if (banknum == 0) { /* non-CFI boot flash */ 70 info->portwidth = FLASH_CFI_8BIT; 71 info->chipwidth = FLASH_CFI_BY8; 72 info->interface = FLASH_CFI_X8; 73 return 1; 74 } else { 75 return 0; 76 } 77} 78 79int board_mmc_init(bd_t *bis) 80{ 81#ifndef CONFIG_DM_MMC 82#ifdef CONFIG_FTSDC010 83 ftsdc010_mmc_init(0); 84#endif 85#endif 86 return 0; 87} 88