LXR uboot/board/pb1x00/pb1x00.c

   1/*
   2 * (C) Copyright 2003
   3 * Thomas.Lange@corelatus.se
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9#include <command.h>
  10#include <mach/au1x00.h>
  11#include <asm/mipsregs.h>
  12#include <asm/io.h>
  13
  14DECLARE_GLOBAL_DATA_PTR;
  15
  16int dram_init(void)
  17{
  18        /* Sdram is setup by assembler code */
  19        /* If memory could be changed, we should return the true value here */
  20        gd->ram_size = 64 * 1024 * 1024;
  21
  22        return 0;
  23}
  24
  25#define BCSR_PCMCIA_PC0DRVEN            0x0010
  26#define BCSR_PCMCIA_PC0RST              0x0080
  27
  28/* In arch/mips/cpu/cpu.c */
  29void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
  30
  31int checkboard (void)
  32{
  33#if defined(CONFIG_IDE_PCMCIA) && 0
  34        u16 status;
  35#endif
  36        /* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
  37        volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
  38        u32 proc_id;
  39
  40        *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
  41
  42        proc_id = read_c0_prid();
  43
  44        switch (proc_id >> 24) {
  45        case 0:
  46                puts ("Board: Pb1000\n");
  47                printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
  48                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  49                break;
  50        case 1:
  51                puts ("Board: Pb1500\n");
  52                printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
  53                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  54                break;
  55        case 2:
  56                puts ("Board: Pb1100\n");
  57                printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
  58                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  59                break;
  60        default:
  61                printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
  62        }
  63
  64        set_io_port_base(0);
  65
  66#if defined(CONFIG_IDE_PCMCIA) && 0
  67        /* Enable 3.3 V on slot 0 ( VCC )
  68           No 5V */
  69        status = 4;
  70        *pcmcia_bcsr = status;
  71
  72        status |= BCSR_PCMCIA_PC0DRVEN;
  73        *pcmcia_bcsr = status;
  74        au_sync();
  75
  76        udelay(300*1000);
  77
  78        status |= BCSR_PCMCIA_PC0RST;
  79        *pcmcia_bcsr = status;
  80        au_sync();
  81
  82        udelay(100*1000);
  83
  84        /* PCMCIA is on a 36 bit physical address.
  85           We need to map it into a 32 bit addresses */
  86
  87#if 0
  88        /* We dont need theese unless we run whole pcmcia package */
  89        write_one_tlb(20,                 /* index */
  90                      0x01ffe000,         /* Pagemask, 16 MB pages */
  91                      CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
  92                      0x3C000017,         /* Lo0 */
  93                      0x3C200017);        /* Lo1 */
  94
  95        write_one_tlb(21,                   /* index */
  96                      0x01ffe000,           /* Pagemask, 16 MB pages */
  97                      CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
  98                      0x3D000017,           /* Lo0 */
  99                      0x3D200017);          /* Lo1 */
 100#endif  /* 0 */
 101        write_one_tlb(22,                   /* index */
 102                      0x01ffe000,           /* Pagemask, 16 MB pages */
 103                      CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
 104                      0x3E000017,           /* Lo0 */
 105                      0x3E200017);          /* Lo1 */
 106#endif  /* CONFIG_IDE_PCMCIA */
 107
 108        return 0;
 109}
 110