1
2
3
4
5
6
7
8
9
10
11#ifndef __CONFIG_TRATS2_H
12#define __CONFIG_TRATS2_H
13
14#include <configs/exynos4-common.h>
15
16#define CONFIG_TIZEN
17
18#define CONFIG_SYS_L2CACHE_OFF
19#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
23
24
25#define CONFIG_NR_DRAM_BANKS 4
26#define CONFIG_SYS_SDRAM_BASE 0x40000000
27#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
28#define SDRAM_BANK_SIZE (256 << 20)
29
30#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33
34
35#define CONFIG_SERIAL2
36
37
38
39#define CONFIG_BOOTCOMMAND "run autoboot"
40#define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
41
42#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
43 - GENERATED_GBL_DATA_SIZE)
44
45#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)
46
47#define CONFIG_SYS_MONITOR_BASE 0x00000000
48
49#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
50#define CONFIG_ENV_SIZE 4096
51#define CONFIG_ENV_OFFSET ((32 - 4) << 10)
52
53#define CONFIG_ENV_OVERWRITE
54
55#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
56
57
58#define PARTS_CSA "csa-mmc"
59#define PARTS_BOOT "boot"
60#define PARTS_QBOOT "qboot"
61#define PARTS_CSC "csc"
62#define PARTS_ROOT "platform"
63#define PARTS_DATA "data"
64#define PARTS_UMS "ums"
65
66#define PARTS_DEFAULT \
67 "uuid_disk=${uuid_gpt_disk};" \
68 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
69 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
70 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
71 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
72 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
73 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
74 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
75
76#define CONFIG_DFU_ALT \
77 "u-boot raw 0x80 0x800;" \
78 "/uImage ext4 0 2;" \
79 "/modem.bin ext4 0 2;" \
80 "/exynos4412-trats2.dtb ext4 0 2;" \
81 ""PARTS_CSA" part 0 1;" \
82 ""PARTS_BOOT" part 0 2;" \
83 ""PARTS_QBOOT" part 0 3;" \
84 ""PARTS_CSC" part 0 4;" \
85 ""PARTS_ROOT" part 0 5;" \
86 ""PARTS_DATA" part 0 6;" \
87 ""PARTS_UMS" part 0 7;" \
88 "params.bin raw 0x38 0x8;" \
89 "/Image.itb ext4 0 2\0"
90
91#define CONFIG_EXTRA_ENV_SETTINGS \
92 "bootk=" \
93 "run loaduimage;" \
94 "if run loaddtb; then " \
95 "bootm 0x40007FC0 - ${fdtaddr};" \
96 "fi;" \
97 "bootm 0x40007FC0;\0" \
98 "updatebackup=" \
99 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
100 " mmc dev 0 0\0" \
101 "updatebootb=" \
102 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
103 "mmcboot=" \
104 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
105 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
106 "run bootk\0" \
107 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
108 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
109 "verify=n\0" \
110 "rootfstype=ext4\0" \
111 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
112 "kernelname=uImage\0" \
113 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
114 "${kernelname}\0" \
115 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
116 "${fdtfile}\0" \
117 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
118 "mmcbootpart=2\0" \
119 "mmcrootpart=5\0" \
120 "opts=always_resume=1\0" \
121 "partitions=" PARTS_DEFAULT \
122 "dfu_alt_info=" CONFIG_DFU_ALT \
123 "uartpath=ap\0" \
124 "usbpath=ap\0" \
125 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
126 "consoleoff=set console console=ram; save; reset\0" \
127 "spladdr=0x40000100\0" \
128 "splsize=0x200\0" \
129 "splfile=falcon.bin\0" \
130 "spl_export=" \
131 "setexpr spl_imgsize ${splsize} + 8 ;" \
132 "setenv spl_imgsize 0x${spl_imgsize};" \
133 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
134 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
135 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
136 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
137 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
138 "spl export atags 0x40007FC0;" \
139 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
140 "mw.l ${spl_addr_tmp} ${splsize};" \
141 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
142 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
143 "setenv spl_imgsize;" \
144 "setenv spl_imgaddr;" \
145 "setenv spl_addr_tmp;\0" \
146 CONFIG_EXTRA_ENV_ITB \
147 "fdtaddr=40800000\0" \
148
149
150
151
152#define CONFIG_EXYNOS_ACE_SHA
153
154
155#define CONFIG_MISC_COMMON
156
157#define CONFIG_MISC_INIT_R
158
159
160#define CONFIG_LCD_MENU
161
162
163#ifndef __ASSEMBLY__
164
165#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
166#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
167#define KEY_PWR_STATUS_MASK (1 << 0)
168#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
169#define KEY_PWR_INTERRUPT_MASK (1 << 1)
170
171#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
172#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
173#endif
174
175
176#define LCD_BPP LCD_COLOR16
177
178
179#define CONFIG_BMP_16BPP
180#define CONFIG_FB_ADDR 0x52504000
181#define CONFIG_EXYNOS_MIPI_DSIM
182#define CONFIG_VIDEO_BMP_GZIP
183#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
184
185#endif
186
