LXR uboot/arch/arm/include/asm/arch-stm32/gpio.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
   4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
   5 */
   6
   7#ifndef _GPIO_H_
   8#define _GPIO_H_
   9
  10enum stm32_gpio_port {
  11        STM32_GPIO_PORT_A = 0,
  12        STM32_GPIO_PORT_B,
  13        STM32_GPIO_PORT_C,
  14        STM32_GPIO_PORT_D,
  15        STM32_GPIO_PORT_E,
  16        STM32_GPIO_PORT_F,
  17        STM32_GPIO_PORT_G,
  18        STM32_GPIO_PORT_H,
  19        STM32_GPIO_PORT_I
  20};
  21
  22enum stm32_gpio_pin {
  23        STM32_GPIO_PIN_0 = 0,
  24        STM32_GPIO_PIN_1,
  25        STM32_GPIO_PIN_2,
  26        STM32_GPIO_PIN_3,
  27        STM32_GPIO_PIN_4,
  28        STM32_GPIO_PIN_5,
  29        STM32_GPIO_PIN_6,
  30        STM32_GPIO_PIN_7,
  31        STM32_GPIO_PIN_8,
  32        STM32_GPIO_PIN_9,
  33        STM32_GPIO_PIN_10,
  34        STM32_GPIO_PIN_11,
  35        STM32_GPIO_PIN_12,
  36        STM32_GPIO_PIN_13,
  37        STM32_GPIO_PIN_14,
  38        STM32_GPIO_PIN_15
  39};
  40
  41enum stm32_gpio_mode {
  42        STM32_GPIO_MODE_IN = 0,
  43        STM32_GPIO_MODE_OUT,
  44        STM32_GPIO_MODE_AF,
  45        STM32_GPIO_MODE_AN
  46};
  47
  48enum stm32_gpio_otype {
  49        STM32_GPIO_OTYPE_PP = 0,
  50        STM32_GPIO_OTYPE_OD
  51};
  52
  53enum stm32_gpio_speed {
  54        STM32_GPIO_SPEED_2M = 0,
  55        STM32_GPIO_SPEED_25M,
  56        STM32_GPIO_SPEED_50M,
  57        STM32_GPIO_SPEED_100M
  58};
  59
  60enum stm32_gpio_pupd {
  61        STM32_GPIO_PUPD_NO = 0,
  62        STM32_GPIO_PUPD_UP,
  63        STM32_GPIO_PUPD_DOWN
  64};
  65
  66enum stm32_gpio_af {
  67        STM32_GPIO_AF0 = 0,
  68        STM32_GPIO_AF1,
  69        STM32_GPIO_AF2,
  70        STM32_GPIO_AF3,
  71        STM32_GPIO_AF4,
  72        STM32_GPIO_AF5,
  73        STM32_GPIO_AF6,
  74        STM32_GPIO_AF7,
  75        STM32_GPIO_AF8,
  76        STM32_GPIO_AF9,
  77        STM32_GPIO_AF10,
  78        STM32_GPIO_AF11,
  79        STM32_GPIO_AF12,
  80        STM32_GPIO_AF13,
  81        STM32_GPIO_AF14,
  82        STM32_GPIO_AF15
  83};
  84
  85struct stm32_gpio_dsc {
  86        enum stm32_gpio_port    port;
  87        enum stm32_gpio_pin     pin;
  88};
  89
  90struct stm32_gpio_ctl {
  91        enum stm32_gpio_mode    mode;
  92        enum stm32_gpio_otype   otype;
  93        enum stm32_gpio_speed   speed;
  94        enum stm32_gpio_pupd    pupd;
  95        enum stm32_gpio_af      af;
  96};
  97
  98struct stm32_gpio_regs {
  99        u32 moder;      /* GPIO port mode */
 100        u32 otyper;     /* GPIO port output type */
 101        u32 ospeedr;    /* GPIO port output speed */
 102        u32 pupdr;      /* GPIO port pull-up/pull-down */
 103        u32 idr;        /* GPIO port input data */
 104        u32 odr;        /* GPIO port output data */
 105        u32 bsrr;       /* GPIO port bit set/reset */
 106        u32 lckr;       /* GPIO port configuration lock */
 107        u32 afr[2];     /* GPIO alternate function */
 108};
 109
 110struct stm32_gpio_priv {
 111        struct stm32_gpio_regs *regs;
 112};
 113
 114#endif /* _GPIO_H_ */
 115