LXR uboot/arch/arm/mach-rockchip/rk322x-board.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
   4 */
   5#include <common.h>
   6#include <clk.h>
   7#include <dm.h>
   8#include <ram.h>
   9#include <syscon.h>
  10#include <asm/io.h>
  11#include <asm/arch/clock.h>
  12#include <asm/arch/periph.h>
  13#include <asm/arch/grf_rk322x.h>
  14#include <asm/arch/boot_mode.h>
  15
  16DECLARE_GLOBAL_DATA_PTR;
  17
  18__weak int rk_board_late_init(void)
  19{
  20        return 0;
  21}
  22
  23int board_late_init(void)
  24{
  25        setup_boot_mode();
  26
  27        return rk_board_late_init();
  28}
  29
  30int board_init(void)
  31{
  32#include <asm/arch/grf_rk322x.h>
  33        /* Enable early UART2 channel 1 on the RK322x */
  34#define GRF_BASE        0x11000000
  35        struct rk322x_grf * const grf = (void *)GRF_BASE;
  36        enum {
  37                GPIO1B2_SHIFT           = 4,
  38                GPIO1B2_MASK            = 3 << GPIO1B2_SHIFT,
  39                GPIO1B2_GPIO            = 0,
  40                GPIO1B2_UART21_SIN,
  41
  42                GPIO1B1_SHIFT           = 2,
  43                GPIO1B1_MASK            = 3 << GPIO1B1_SHIFT,
  44                GPIO1B1_GPIO            = 0,
  45                GPIO1B1_UART1_SOUT,
  46                GPIO1B1_UART21_SOUT,
  47        };
  48        enum {
  49                CON_IOMUX_UART2SEL_SHIFT= 8,
  50                CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
  51                CON_IOMUX_UART2SEL_2    = 0,
  52                CON_IOMUX_UART2SEL_21,
  53        };
  54
  55        rk_clrsetreg(&grf->gpio1b_iomux,
  56                     GPIO1B1_MASK | GPIO1B2_MASK,
  57                     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
  58                     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
  59        /* Set channel C as UART2 input */
  60        rk_clrsetreg(&grf->con_iomux,
  61                     CON_IOMUX_UART2SEL_MASK,
  62                     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
  63
  64        /*
  65        * The integrated macphy is enabled by default, disable it
  66        * for saving power consuming.
  67        */
  68        rk_clrsetreg(&grf->macphy_con[0],
  69                     MACPHY_CFG_ENABLE_MASK,
  70                     0 << MACPHY_CFG_ENABLE_SHIFT);
  71
  72        return 0;
  73}
  74
  75int dram_init_banksize(void)
  76{
  77        gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  78        gd->bd->bi_dram[0].size = 0x8400000;
  79        /* Reserve 0x200000 for OPTEE */
  80        gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
  81                                + gd->bd->bi_dram[0].size + 0x200000;
  82        gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
  83                                + gd->ram_size - gd->bd->bi_dram[1].start;
  84
  85        return 0;
  86}
  87
  88#ifndef CONFIG_SYS_DCACHE_OFF
  89void enable_caches(void)
  90{
  91        /* Enable D-cache. I-cache is already enabled in start.S */
  92        dcache_enable();
  93}
  94#endif
  95
  96#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  97#include <usb.h>
  98#include <usb/dwc2_udc.h>
  99
 100static struct dwc2_plat_otg_data rk322x_otg_data = {
 101        .rx_fifo_sz     = 512,
 102        .np_tx_fifo_sz  = 16,
 103        .tx_fifo_sz     = 128,
 104};
 105
 106int board_usb_init(int index, enum usb_init_type init)
 107{
 108        int node;
 109        const char *mode;
 110        bool matched = false;
 111        const void *blob = gd->fdt_blob;
 112
 113        /* find the usb_otg node */
 114        node = fdt_node_offset_by_compatible(blob, -1,
 115                                        "rockchip,rk3288-usb");
 116
 117        while (node > 0) {
 118                mode = fdt_getprop(blob, node, "dr_mode", NULL);
 119                if (mode && strcmp(mode, "otg") == 0) {
 120                        matched = true;
 121                        break;
 122                }
 123
 124                node = fdt_node_offset_by_compatible(blob, node,
 125                                        "rockchip,rk3288-usb");
 126        }
 127        if (!matched) {
 128                debug("Not found usb_otg device\n");
 129                return -ENODEV;
 130        }
 131        rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
 132
 133        return dwc2_udc_probe(&rk322x_otg_data);
 134}
 135
 136int board_usb_cleanup(int index, enum usb_init_type init)
 137{
 138        return 0;
 139}
 140#endif
 141
 142#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 143int fb_set_reboot_flag(void)
 144{
 145        struct rk322x_grf *grf;
 146
 147        printf("Setting reboot to fastboot flag ...\n");
 148        grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 149        /* Set boot mode to fastboot */
 150        writel(BOOT_FASTBOOT, &grf->os_reg[0]);
 151
 152        return 0;
 153}
 154#endif
 155