1
2
3
4
5
6#include <common.h>
7#include <status_led.h>
8#include <dm.h>
9#include <ns16550.h>
10#include <twl4030.h>
11#include <netdev.h>
12#include <spl.h>
13#include <asm/gpio.h>
14#include <asm/io.h>
15#include <asm/arch/mem.h>
16#include <asm/arch/mmc_host_def.h>
17#include <asm/arch/mux.h>
18#include <asm/arch/sys_proto.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/rawnand.h>
21#include <linux/mtd/onenand.h>
22#include <jffs2/load_kernel.h>
23#include <mtd_node.h>
24#include <fdt_support.h>
25#include "igep00x0.h"
26
27static const struct ns16550_platdata igep_serial = {
28 .base = OMAP34XX_UART3,
29 .reg_shift = 2,
30 .clock = V_NS16550_CLK,
31 .fcr = UART_FCR_DEFVAL,
32};
33
34U_BOOT_DEVICE(igep_uart) = {
35 "ns16550_serial",
36 &igep_serial
37};
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52static int get_board_revision(void)
53{
54 int revision;
55
56 gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
57 "igep0030_usb_transceiver_reset");
58 gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
59
60 gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
61 gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
62 revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
63 gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
64
65 gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
66 "igep00x0_revision_detection");
67 gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
68 revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
69 gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
70
71 gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
72
73 return revision;
74}
75
76int onenand_board_init(struct mtd_info *mtd)
77{
78 if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
79 struct onenand_chip *this = mtd->priv;
80 this->base = (void *)CONFIG_SYS_ONENAND_BASE;
81 return 0;
82 }
83 return 1;
84}
85
86#if defined(CONFIG_CMD_NET)
87static void reset_net_chip(int gpio)
88{
89 if (!gpio_request(gpio, "eth nrst")) {
90 gpio_direction_output(gpio, 1);
91 udelay(1);
92 gpio_set_value(gpio, 0);
93 udelay(40);
94 gpio_set_value(gpio, 1);
95 mdelay(10);
96 }
97}
98
99
100
101
102
103
104static void setup_net_chip(void)
105{
106 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
107 static const u32 gpmc_lan_config[] = {
108 NET_LAN9221_GPMC_CONFIG1,
109 NET_LAN9221_GPMC_CONFIG2,
110 NET_LAN9221_GPMC_CONFIG3,
111 NET_LAN9221_GPMC_CONFIG4,
112 NET_LAN9221_GPMC_CONFIG5,
113 NET_LAN9221_GPMC_CONFIG6,
114 };
115
116 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
117 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
118
119
120 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
121
122 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
123
124 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
125 &ctrl_base->gpmc_nadv_ale);
126
127 reset_net_chip(64);
128}
129
130int board_eth_init(bd_t *bis)
131{
132#ifdef CONFIG_SMC911X
133 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
134#else
135 return 0;
136#endif
137}
138#else
139static inline void setup_net_chip(void) {}
140#endif
141
142#ifdef CONFIG_OF_BOARD_SETUP
143static int ft_enable_by_compatible(void *blob, char *compat, int enable)
144{
145 int off = fdt_node_offset_by_compatible(blob, -1, compat);
146 if (off < 0)
147 return off;
148
149 if (enable)
150 fdt_status_okay(blob, off);
151 else
152 fdt_status_disabled(blob, off);
153
154 return 0;
155}
156
157int ft_board_setup(void *blob, bd_t *bd)
158{
159#ifdef CONFIG_FDT_FIXUP_PARTITIONS
160 static struct node_info nodes[] = {
161 { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
162 { "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
163 };
164
165 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
166#endif
167 ft_enable_by_compatible(blob, "ti,omap2-nand",
168 gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
169 ft_enable_by_compatible(blob, "ti,omap2-onenand",
170 gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
171
172 return 0;
173}
174#endif
175
176void set_led(void)
177{
178 switch (get_board_revision()) {
179 case 0:
180 case 1:
181 gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
182 gpio_direction_output(IGEP0020_GPIO_LED, 1);
183 break;
184 case 2:
185 case 3:
186 gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
187 gpio_direction_output(IGEP0030_GPIO_LED, 0);
188 break;
189 default:
190
191 break;
192 }
193}
194
195void set_boardname(void)
196{
197 char rev[5] = { 'F','C','G','E', };
198 int i = get_board_revision();
199
200 rev[i+1] = 0;
201 env_set("board_rev", rev + i);
202 env_set("board_name", i < 2 ? "igep0020" : "igep0030");
203}
204
205
206
207
208
209int misc_init_r(void)
210{
211 t2_t *t2_base = (t2_t *)T2_BASE;
212 u32 pbias_lite;
213
214 twl4030_power_init();
215
216
217 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
218 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
219 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
220 TWL4030_PM_RECEIVER_DEV_GRP_P1);
221
222
223 pbias_lite = readl(&t2_base->pbias_lite);
224 pbias_lite &= ~PBIASLITEVMODE1;
225 pbias_lite |= PBIASLITEPWRDNZ1;
226 writel(pbias_lite, &t2_base->pbias_lite);
227 if (get_cpu_family() == CPU_OMAP36XX)
228 writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
229 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
230 OMAP34XX_CTRL_WKUP_CTRL);
231
232 setup_net_chip();
233
234 omap_die_id_display();
235
236 set_led();
237
238 set_boardname();
239
240 return 0;
241}
242
243void board_mtdparts_default(const char **mtdids, const char **mtdparts)
244{
245 struct mtd_info *mtd = get_mtd_device(NULL, 0);
246 if (mtd) {
247 static char ids[24];
248 static char parts[48];
249 const char *linux_name = "omap2-nand";
250 if (strncmp(mtd->name, "onenand0", 8) == 0)
251 linux_name = "omap2-onenand";
252 snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
253 snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
254 linux_name, 4 * mtd->erasesize >> 10);
255 *mtdids = ids;
256 *mtdparts = parts;
257 }
258}
259