LXR uboot/drivers/i2c/sh_sh7734

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   4 * Copyright (C) 2012 Renesas Solutions Corp.
   5 *
   6 * NOTE: This driver should be converted to driver model before June 2017.
   7 * Please see doc/driver-model/i2c-howto.txt for instructions.
   8 */
   9
  10#include <common.h>
  11#include <i2c.h>
  12#include <asm/io.h>
  13
  14struct sh_i2c {
  15        u8 iccr1;
  16        u8 iccr2;
  17        u8 icmr;
  18        u8 icier;
  19        u8 icsr;
  20        u8 sar;
  21        u8 icdrt;
  22        u8 icdrr;
  23        u8 nf2cyc;
  24        u8 __pad0;
  25        u8 __pad1;
  26};
  27
  28static struct sh_i2c *base;
  29static u8 iccr1_cks, nf2cyc;
  30
  31/* ICCR1 */
  32#define SH_I2C_ICCR1_ICE        (1 << 7)
  33#define SH_I2C_ICCR1_RCVD       (1 << 6)
  34#define SH_I2C_ICCR1_MST        (1 << 5)
  35#define SH_I2C_ICCR1_TRS        (1 << 4)
  36#define SH_I2C_ICCR1_MTRS       \
  37        (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS)
  38
  39/* ICCR1 */
  40#define SH_I2C_ICCR2_BBSY       (1 << 7)
  41#define SH_I2C_ICCR2_SCP        (1 << 6)
  42#define SH_I2C_ICCR2_SDAO       (1 << 5)
  43#define SH_I2C_ICCR2_SDAOP      (1 << 4)
  44#define SH_I2C_ICCR2_SCLO       (1 << 3)
  45#define SH_I2C_ICCR2_IICRST     (1 << 1)
  46
  47#define SH_I2C_ICIER_TIE        (1 << 7)
  48#define SH_I2C_ICIER_TEIE       (1 << 6)
  49#define SH_I2C_ICIER_RIE        (1 << 5)
  50#define SH_I2C_ICIER_NAKIE      (1 << 4)
  51#define SH_I2C_ICIER_STIE       (1 << 3)
  52#define SH_I2C_ICIER_ACKE       (1 << 2)
  53#define SH_I2C_ICIER_ACKBR      (1 << 1)
  54#define SH_I2C_ICIER_ACKBT      (1 << 0)
  55
  56#define SH_I2C_ICSR_TDRE        (1 << 7)
  57#define SH_I2C_ICSR_TEND        (1 << 6)
  58#define SH_I2C_ICSR_RDRF        (1 << 5)
  59#define SH_I2C_ICSR_NACKF       (1 << 4)
  60#define SH_I2C_ICSR_STOP        (1 << 3)
  61#define SH_I2C_ICSR_ALOVE       (1 << 2)
  62#define SH_I2C_ICSR_AAS         (1 << 1)
  63#define SH_I2C_ICSR_ADZ         (1 << 0)
  64
  65#define IRQ_WAIT 1000
  66
  67static void sh_i2c_send_stop(struct sh_i2c *base)
  68{
  69        clrbits_8(&base->iccr2, SH_I2C_ICCR2_BBSY | SH_I2C_ICCR2_SCP);
  70}
  71
  72static int check_icsr_bits(struct sh_i2c *base, u8 bits)
  73{
  74        int i;
  75
  76        for (i = 0; i < IRQ_WAIT; i++) {
  77                if (bits & readb(&base->icsr))
  78                        return 0;
  79                udelay(10);
  80        }
  81
  82        return 1;
  83}
  84
  85static int check_stop(struct sh_i2c *base)
  86{
  87        int ret = check_icsr_bits(base, SH_I2C_ICSR_STOP);
  88        clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
  89
  90        return ret;
  91}
  92
  93static int check_tend(struct sh_i2c *base, int stop)
  94{
  95        int ret = check_icsr_bits(base, SH_I2C_ICSR_TEND);
  96
  97        if (stop) {
  98                clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
  99                sh_i2c_send_stop(base);
 100        }
 101
 102        clrbits_8(&base->icsr, SH_I2C_ICSR_TEND);
 103        return ret;
 104}
 105
 106static int check_tdre(struct sh_i2c *base)
 107{
 108        return check_icsr_bits(base, SH_I2C_ICSR_TDRE);
 109}
 110
 111static int check_rdrf(struct sh_i2c *base)
 112{
 113        return check_icsr_bits(base, SH_I2C_ICSR_RDRF);
 114}
 115
 116static int check_bbsy(struct sh_i2c *base)
 117{
 118        int i;
 119
 120        for (i = 0 ; i < IRQ_WAIT ; i++) {
 121                if (!(SH_I2C_ICCR2_BBSY & readb(&base->iccr2)))
 122                        return 0;
 123                udelay(10);
 124        }
 125        return 1;
 126}
 127
 128static int check_ackbr(struct sh_i2c *base)
 129{
 130        int i;
 131
 132        for (i = 0 ; i < IRQ_WAIT ; i++) {
 133                if (!(SH_I2C_ICIER_ACKBR & readb(&base->icier)))
 134                        return 0;
 135                udelay(10);
 136        }
 137
 138        return 1;
 139}
 140
 141static void sh_i2c_reset(struct sh_i2c *base)
 142{
 143        setbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
 144
 145        udelay(100);
 146
 147        clrbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
 148}
 149
 150static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg)
 151{
 152        if (check_bbsy(base)) {
 153                puts("i2c bus busy\n");
 154                goto fail;
 155        }
 156
 157        setbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 158        clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
 159
 160        writeb((id << 1), &base->icdrt);
 161
 162        if (check_tend(base, 0)) {
 163                puts("TEND check fail...\n");
 164                goto fail;
 165        }
 166
 167        if (check_ackbr(base)) {
 168                check_tend(base, 0);
 169                sh_i2c_send_stop(base);
 170                goto fail;
 171        }
 172
 173        writeb(reg, &base->icdrt);
 174
 175        if (check_tdre(base)) {
 176                puts("TDRE check fail...\n");
 177                goto fail;
 178        }
 179
 180        if (check_tend(base, 0)) {
 181                puts("TEND check fail...\n");
 182                goto fail;
 183        }
 184
 185        return 0;
 186fail:
 187
 188        return 1;
 189}
 190
 191static int
 192i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 *val, int size)
 193{
 194        int i;
 195
 196        if (i2c_set_addr(base, id, reg)) {
 197                puts("Fail set slave address\n");
 198                return 1;
 199        }
 200
 201        for (i = 0; i < size; i++) {
 202                writeb(val[i], &base->icdrt);
 203                check_tdre(base);
 204        }
 205
 206        check_tend(base, 1);
 207        check_stop(base);
 208
 209        udelay(100);
 210
 211        clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 212        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 213        sh_i2c_reset(base);
 214
 215        return 0;
 216}
 217
 218static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 219{
 220        u8 ret = 0;
 221
 222        if (i2c_set_addr(base, id, reg)) {
 223                puts("Fail set slave address\n");
 224                goto fail;
 225        }
 226
 227        clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
 228        writeb((id << 1) | 1, &base->icdrt);
 229
 230        if (check_tend(base, 0))
 231                puts("TDRE check fail...\n");
 232
 233        clrsetbits_8(&base->iccr1, SH_I2C_ICCR1_TRS, SH_I2C_ICCR1_MST);
 234        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 235        setbits_8(&base->icier, SH_I2C_ICIER_ACKBT);
 236        setbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
 237
 238        /* read data (dummy) */
 239        ret = readb(&base->icdrr);
 240
 241        if (check_rdrf(base)) {
 242                puts("check RDRF error\n");
 243                goto fail;
 244        }
 245
 246        clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
 247        udelay(1000);
 248
 249        sh_i2c_send_stop(base);
 250
 251        if (check_stop(base)) {
 252                puts("check STOP error\n");
 253                goto fail;
 254        }
 255
 256        clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 257        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 258
 259        /* data read */
 260        ret = readb(&base->icdrr);
 261
 262fail:
 263        clrbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
 264
 265        return ret;
 266}
 267
 268#ifdef CONFIG_I2C_MULTI_BUS
 269static unsigned int current_bus;
 270
 271/**
 272 * i2c_set_bus_num - change active I2C bus
 273 *      @bus: bus index, zero based
 274 *      @returns: 0 on success, non-0 on failure
 275 */
 276int i2c_set_bus_num(unsigned int bus)
 277{
 278        switch (bus) {
 279        case 0:
 280                base = (void *)CONFIG_SH_I2C_BASE0;
 281                break;
 282        case 1:
 283                base = (void *)CONFIG_SH_I2C_BASE1;
 284                break;
 285        default:
 286                printf("Bad bus: %d\n", bus);
 287                return -1;
 288        }
 289
 290        current_bus = bus;
 291
 292        return 0;
 293}
 294
 295/**
 296 * i2c_get_bus_num - returns index of active I2C bus
 297 */
 298unsigned int i2c_get_bus_num(void)
 299{
 300        return current_bus;
 301}
 302#endif
 303
 304void i2c_init(int speed, int slaveaddr)
 305{
 306#ifdef CONFIG_I2C_MULTI_BUS
 307        current_bus = 0;
 308#endif
 309        base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0;
 310
 311        if (speed == 400000)
 312                iccr1_cks = 0x07;
 313        else
 314                iccr1_cks = 0x0F;
 315
 316        nf2cyc = 1;
 317
 318        /* Reset */
 319        sh_i2c_reset(base);
 320
 321        /* ICE enable and set clock */
 322        writeb(SH_I2C_ICCR1_ICE | iccr1_cks, &base->iccr1);
 323        writeb(nf2cyc, &base->nf2cyc);
 324}
 325
 326/*
 327 * i2c_read: - Read multiple bytes from an i2c device
 328 *
 329 * The higher level routines take into account that this function is only
 330 * called with len < page length of the device (see configuration file)
 331 *
 332 * @chip:   address of the chip which is to be read
 333 * @addr:   i2c data address within the chip
 334 * @alen:   length of the i2c data address (1..2 bytes)
 335 * @buffer: where to write the data
 336 * @len:    how much byte do we want to read
 337 * @return: 0 in case of success
 338 */
 339int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 340{
 341        int i = 0;
 342        for (i = 0; i < len; i++)
 343                buffer[i] = i2c_raw_read(base, chip, addr + i);
 344
 345        return 0;
 346}
 347
 348/*
 349 * i2c_write: -  Write multiple bytes to an i2c device
 350 *
 351 * The higher level routines take into account that this function is only
 352 * called with len < page length of the device (see configuration file)
 353 *
 354 * @chip:   address of the chip which is to be written
 355 * @addr:   i2c data address within the chip
 356 * @alen:   length of the i2c data address (1..2 bytes)
 357 * @buffer: where to find the data to be written
 358 * @len:    how much byte do we want to read
 359 * @return: 0 in case of success
 360 */
 361int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 362{
 363        return i2c_raw_write(base, chip, addr, buffer, len);
 364}
 365
 366/*
 367 * i2c_probe: - Test if a chip answers for a given i2c address
 368 *
 369 * @chip:   address of the chip which is searched for
 370 * @return: 0 if a chip was found, -1 otherwhise
 371 */
 372int i2c_probe(u8 chip)
 373{
 374        u8 byte;
 375        return i2c_read(chip, 0, 0, &byte, 1);
 376}
 377