1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the ESPT-GIGA board 4 * 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 7 */ 8 9#ifndef __ESPT_H 10#define __ESPT_H 11 12#define CONFIG_CPU_SH7763 1 13#define __LITTLE_ENDIAN 1 14 15#define CONFIG_ENV_OVERWRITE 1 16 17#define CONFIG_DISPLAY_BOARDINFO 18#undef CONFIG_SHOW_BOOT_PROGRESS 19 20/* SCIF */ 21#define CONFIG_CONS_SCIF0 1 22 23#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 24#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate 25 settings for this board */ 26 27/* SDRAM */ 28#define CONFIG_SYS_SDRAM_BASE (0x8C000000) 29#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 30#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 32 33/* Flash(NOR) S29JL064H */ 34#define CONFIG_SYS_FLASH_BASE (0xA0000000) 35#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 36#define CONFIG_SYS_MAX_FLASH_BANKS (1) 37#define CONFIG_SYS_MAX_FLASH_SECT (150) 38 39/* U-Boot setting */ 40#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 41#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 42#define CONFIG_SYS_MONITOR_LEN (128 * 1024) 43/* Size of DRAM reserved for malloc() use */ 44#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) 45#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 46 47#define CONFIG_SYS_FLASH_CFI 48#define CONFIG_FLASH_CFI_DRIVER 49#undef CONFIG_SYS_FLASH_QUIET_TEST 50#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 51/* Timeout for Flash erase operations (in ms) */ 52#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 53/* Timeout for Flash write operations (in ms) */ 54#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 55/* Timeout for Flash set sector lock bit operations (in ms) */ 56#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 57/* Timeout for Flash clear lock bit operations (in ms) */ 58#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 59/* Use hardware flash sectors protection instead of U-Boot software protection */ 60#undef CONFIG_SYS_FLASH_PROTECTION 61#undef CONFIG_SYS_DIRECT_FLASH_TFTP 62#define CONFIG_ENV_SECT_SIZE (128 * 1024) 63#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 64#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) 65/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 66#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 67#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 68#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 69 70/* Clock */ 71#define CONFIG_SYS_CLK_FREQ 66666666 72#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 73#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 74#define CONFIG_SYS_TMU_CLK_DIV 4 75 76/* Ether */ 77#define CONFIG_SH_ETHER_USE_PORT (1) 78#define CONFIG_SH_ETHER_PHY_ADDR (0x00) 79#define CONFIG_BITBANGMII 80#define CONFIG_BITBANGMII_MULTI 81#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 82 83#endif /* __SH7763RDP_H */ 84