LXR uboot/include/configs/xpedite537x.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright 2008 Extreme Engineering Solutions, Inc.
   4 * Copyright 2007-2008 Freescale Semiconductor, Inc.
   5 */
   6
   7/*
   8 * xpedite537x board configuration file
   9 */
  10#ifndef __CONFIG_H
  11#define __CONFIG_H
  12
  13/*
  14 * High Level Configuration Options
  15 */
  16#define CONFIG_SYS_BOARD_NAME   "XPedite5370"
  17#define CONFIG_SYS_FORM_3U_VPX  1
  18
  19#define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  20#define CONFIG_PCIE1            1       /* PCIE controller 1 */
  21#define CONFIG_PCIE2            1       /* PCIE controller 2 */
  22#define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  23#define CONFIG_PCI_INDIRECT_BRIDGE 1    /* indirect PCI bridge support */
  24#define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  25#define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
  26
  27/*
  28 * Multicore config
  29 */
  30#define CONFIG_MP
  31#define CONFIG_BPTR_VIRT_ADDR   0xee000000      /* virt boot page address */
  32#define CONFIG_MPC8xxx_DISABLE_BPTR             /* Don't leave BPTR enabled */
  33
  34/*
  35 * DDR config
  36 */
  37#undef CONFIG_FSL_DDR_INTERACTIVE
  38#define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  39#define CONFIG_DDR_SPD
  40#define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  41#define SPD_EEPROM_ADDRESS1             0x54    /* Both channels use the */
  42#define SPD_EEPROM_ADDRESS2             0x54    /* same SPD data         */
  43#define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
  44#define CONFIG_DIMM_SLOTS_PER_CTLR      1
  45#define CONFIG_CHIP_SELECTS_PER_CTRL    1
  46#define CONFIG_DDR_ECC
  47#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  48#define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
  49#define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  50#define CONFIG_VERY_BIG_RAM
  51
  52#ifndef __ASSEMBLY__
  53extern unsigned long get_board_sys_clk(unsigned long dummy);
  54extern unsigned long get_board_ddr_clk(unsigned long dummy);
  55#endif
  56
  57#define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
  58#define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
  59
  60/*
  61 * These can be toggled for performance analysis, otherwise use default.
  62 */
  63#define CONFIG_L2_CACHE                 /* toggle L2 cache */
  64#define CONFIG_BTB                      /* toggle branch predition */
  65#define CONFIG_ENABLE_36BIT_PHYS        1
  66
  67#define CONFIG_SYS_CCSRBAR              0xef000000
  68#define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
  69
  70/*
  71 * Diagnostics
  72 */
  73#define CONFIG_SYS_MEMTEST_START        0x10000000
  74#define CONFIG_SYS_MEMTEST_END          0x20000000
  75#define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
  76                                         CONFIG_SYS_POST_I2C)
  77/* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */
  78#define I2C_ADDR_IGNORE_LIST            {0x50}
  79
  80/*
  81 * Memory map
  82 * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
  83 * 0x8000_0000  0xbfff_ffff     PCIe1 Mem               1G non-cacheable
  84 * 0xc000_0000  0xcfff_ffff     PCIe2 Mem               256M non-cacheable
  85 * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
  86 * 0xe800_0000  0xe87f_ffff     PCIe1 IO                8M non-cacheable
  87 * 0xe880_0000  0xe8ff_ffff     PCIe2 IO                8M non-cacheable
  88 * 0xee00_0000  0xee00_ffff     Boot page translation   4K non-cacheable
  89 * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
  90 * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
  91 * 0xf000_0000  0xf7ff_ffff     NOR Flash 2             128M non-cacheable
  92 * 0xf800_0000  0xffff_ffff     NOR Flash 1             128M non-cacheable
  93 */
  94
  95#define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
  96
  97/*
  98 * NAND flash configuration
  99 */
 100#define CONFIG_SYS_NAND_BASE            0xef800000
 101#define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 102#define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
 103                                         CONFIG_SYS_NAND_BASE2}
 104#define CONFIG_SYS_MAX_NAND_DEVICE      2
 105#define CONFIG_NAND_FSL_ELBC
 106
 107/*
 108 * NOR flash configuration
 109 */
 110#define CONFIG_SYS_FLASH_BASE           0xf8000000
 111#define CONFIG_SYS_FLASH_BASE2          0xf0000000
 112#define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 113#define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 114#define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 115#define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 116#define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 117#define CONFIG_FLASH_CFI_DRIVER
 118#define CONFIG_SYS_FLASH_CFI
 119#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 120#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 121                                                  {0xf7f40000, 0xc0000} }
 122#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 123
 124/*
 125 * Chip select configuration
 126 */
 127/* NOR Flash 0 on CS0 */
 128#define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 129                                 BR_PS_16               | \
 130                                 BR_V)
 131#define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
 132                                 OR_GPCM_CSNT           | \
 133                                 OR_GPCM_XACS           | \
 134                                 OR_GPCM_ACS_DIV2       | \
 135                                 OR_GPCM_SCY_8          | \
 136                                 OR_GPCM_TRLX           | \
 137                                 OR_GPCM_EHTR           | \
 138                                 OR_GPCM_EAD)
 139
 140/* NOR Flash 1 on CS1 */
 141#define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 142                                 BR_PS_16               | \
 143                                 BR_V)
 144#define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 145
 146/* NAND flash on CS2 */
 147#define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 148                                 (2<<BR_DECC_SHIFT)     | \
 149                                 BR_PS_8                | \
 150                                 BR_MS_FCM              | \
 151                                 BR_V)
 152
 153/* NAND flash on CS2 */
 154#define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
 155                                 OR_FCM_PGS     | \
 156                                 OR_FCM_CSCT    | \
 157                                 OR_FCM_CST     | \
 158                                 OR_FCM_CHT     | \
 159                                 OR_FCM_SCY_1   | \
 160                                 OR_FCM_TRLX    | \
 161                                 OR_FCM_EHTR)
 162
 163/* NAND flash on CS3 */
 164#define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 165                                 (2<<BR_DECC_SHIFT)     | \
 166                                 BR_PS_8                | \
 167                                 BR_MS_FCM              | \
 168                                 BR_V)
 169#define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 170
 171/*
 172 * Use L1 as initial stack
 173 */
 174#define CONFIG_SYS_INIT_RAM_LOCK        1
 175#define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 176#define CONFIG_SYS_INIT_RAM_SIZE                0x00004000
 177
 178#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 179#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 180
 181#define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 182#define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 183
 184/*
 185 * Serial Port
 186 */
 187#define CONFIG_SYS_NS16550_SERIAL
 188#define CONFIG_SYS_NS16550_REG_SIZE     1
 189#define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 190#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 191#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 192#define CONFIG_SYS_BAUDRATE_TABLE       \
 193        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 194#define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 195#define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 196
 197/*
 198 * I2C
 199 */
 200#define CONFIG_SYS_I2C
 201#define CONFIG_SYS_I2C_FSL
 202#define CONFIG_SYS_FSL_I2C_SPEED        400000
 203#define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 204#define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 205#define CONFIG_SYS_FSL_I2C2_SPEED       400000
 206#define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 207#define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 208#define CONFIG_SYS_I2C_NOPROBES         { {0, 0x69} }
 209
 210/* PEX8518 slave I2C interface */
 211#define CONFIG_SYS_I2C_PEX8518_ADDR     0x70
 212
 213/* I2C DS1631 temperature sensor */
 214#define CONFIG_SYS_I2C_LM90_ADDR        0x4c
 215
 216/* I2C EEPROM - AT24C128B */
 217#define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 218#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 219#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 220#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 221
 222/* I2C RTC */
 223#define CONFIG_RTC_M41T11               1
 224#define CONFIG_SYS_I2C_RTC_ADDR         0x68
 225#define CONFIG_SYS_M41T11_BASE_YEAR     2000
 226
 227/* GPIO */
 228#define CONFIG_PCA953X
 229#define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
 230#define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
 231#define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
 232#define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
 233#define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
 234
 235/*
 236 * PU = pulled high, PD = pulled low
 237 * I = input, O = output, IO = input/output
 238 */
 239/* PCA9557 @ 0x18*/
 240#define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
 241#define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select */
 242#define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
 243#define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select */
 244#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
 245#define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Set to 0 to enable NVM writing */
 246#define CONFIG_SYS_PCA953X_C0_VCORE_VID2        0x40 /* VID2 of ISL6262 */
 247#define CONFIG_SYS_PCA953X_C0_VCORE_VID3        0x80 /* VID3 of ISL6262 */
 248
 249/* PCA9557 @ 0x1c*/
 250#define CONFIG_SYS_PCA953X_XMC0_ROOT0           0x01 /* PU; Low if XMC is RC */
 251#define CONFIG_SYS_PCA953X_XMC0_MVMR0           0x02 /* XMC EEPROM write protect */
 252#define CONFIG_SYS_PCA953X_XMC0_WAKE            0x04 /* PU; XMC wake */
 253#define CONFIG_SYS_PCA953X_XMC0_BIST            0x08 /* PU; XMC built in self test */
 254#define CONFIG_SYS_PCA953X_XMC_PRESENT          0x10 /* PU; Low if XMC module installed */
 255#define CONFIG_SYS_PCA953X_PMC_PRESENT          0x20 /* PU; Low if PMC module installed */
 256#define CONFIG_SYS_PCA953X_PMC0_MONARCH         0x40 /* PMC monarch mode enable */
 257#define CONFIG_SYS_PCA953X_PMC0_EREADY          0x80 /* PU; PMC PCI eready */
 258
 259/* PCA9557 @ 0x1e*/
 260#define CONFIG_SYS_PCA953X_P0_GA0               0x01 /* PU; VPX Geographical address */
 261#define CONFIG_SYS_PCA953X_P0_GA1               0x02 /* PU; VPX Geographical address */
 262#define CONFIG_SYS_PCA953X_P0_GA2               0x04 /* PU; VPX Geographical address */
 263#define CONFIG_SYS_PCA953X_P0_GA3               0x08 /* PU; VPX Geographical address */
 264#define CONFIG_SYS_PCA953X_P0_GA4               0x10 /* PU; VPX Geographical address */
 265#define CONFIG_SYS_PCA953X_P0_GAP               0x20 /* PU; tied to VPX P0.GAP */
 266#define CONFIG_SYS_PCA953X_P1_SYSEN             0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */
 267
 268/* PCA9557 @ 0x1f */
 269#define CONFIG_SYS_PCA953X_GPIO_VPX0            0x01 /* PU */
 270#define CONFIG_SYS_PCA953X_GPIO_VPX1            0x02 /* PU */
 271#define CONFIG_SYS_PCA953X_GPIO_VPX2            0x04 /* PU */
 272#define CONFIG_SYS_PCA953X_GPIO_VPX3            0x08 /* PU */
 273#define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL        0x10 /* PD; I2C master source for FRU SEEPROM */
 274
 275/*
 276 * General PCI
 277 * Memory space is mapped 1-1, but I/O space must start from 0.
 278 */
 279/* PCIE1 - VPX P1 */
 280#define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 281#define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BUS
 282#define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
 283#define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 284#define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
 285#define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
 286
 287/* PCIE2 - PEX8518 */
 288#define CONFIG_SYS_PCIE2_MEM_BUS        0xc0000000
 289#define CONFIG_SYS_PCIE2_MEM_PHYS       CONFIG_SYS_PCIE2_MEM_BUS
 290#define CONFIG_SYS_PCIE2_MEM_SIZE       0x10000000      /* 256M */
 291#define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 292#define CONFIG_SYS_PCIE2_IO_PHYS        0xe8800000
 293#define CONFIG_SYS_PCIE2_IO_SIZE        0x00800000      /* 8M */
 294
 295/*
 296 * Networking options
 297 */
 298#define CONFIG_TSEC_TBI
 299#define CONFIG_MII              1       /* MII PHY management */
 300#define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
 301#define CONFIG_ETHPRIME         "eTSEC2"
 302
 303/*
 304 * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
 305 * 1000mbps SGMII link
 306 */
 307#define CONFIG_TSEC_TBICR_SETTINGS ( \
 308                TBICR_PHY_RESET \
 309                | TBICR_FULL_DUPLEX \
 310                | TBICR_SPEED1_SET \
 311                )
 312
 313#define CONFIG_TSEC1            1
 314#define CONFIG_TSEC1_NAME       "eTSEC1"
 315#define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 316#define TSEC1_PHY_ADDR          1
 317#define TSEC1_PHYIDX            0
 318#define CONFIG_HAS_ETH0
 319
 320#define CONFIG_TSEC2            1
 321#define CONFIG_TSEC2_NAME       "eTSEC2"
 322#define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 323#define TSEC2_PHY_ADDR          2
 324#define TSEC2_PHYIDX            0
 325#define CONFIG_HAS_ETH1
 326
 327/*
 328 * Miscellaneous configurable options
 329 */
 330#define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 331#define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 332#define CONFIG_PREBOOT                          /* enable preboot variable */
 333#define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 334
 335/*
 336 * For booting Linux, the board info and command line data
 337 * have to be in the first 16 MB of memory, since this is
 338 * the maximum mapped by the Linux kernel during initialization.
 339 */
 340#define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 341#define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 342
 343/*
 344 * Environment Configuration
 345 */
 346#define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 347#define CONFIG_ENV_SIZE         0x8000
 348#define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 349
 350/*
 351 * Flash memory map:
 352 * fff80000 - ffffffff     Pri U-Boot (512 KB)
 353 * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 354 * fff00000 - fff3ffff     Pri FDT (256KB)
 355 * fef00000 - ffefffff     Pri OS image (16MB)
 356 * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
 357 *
 358 * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
 359 * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
 360 * f7f00000 - f7f3ffff     Sec FDT (256KB)
 361 * f6f00000 - f7efffff     Sec OS image (16MB)
 362 * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
 363 */
 364#define CONFIG_UBOOT1_ENV_ADDR  __stringify(0xfff80000)
 365#define CONFIG_UBOOT2_ENV_ADDR  __stringify(0xf7f80000)
 366#define CONFIG_FDT1_ENV_ADDR    __stringify(0xfff00000)
 367#define CONFIG_FDT2_ENV_ADDR    __stringify(0xf7f00000)
 368#define CONFIG_OS1_ENV_ADDR     __stringify(0xfef00000)
 369#define CONFIG_OS2_ENV_ADDR     __stringify(0xf6f00000)
 370
 371#define CONFIG_PROG_UBOOT1                                              \
 372        "$download_cmd $loadaddr $ubootfile; "                          \
 373        "if test $? -eq 0; then "                                       \
 374                "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 375                "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 376                "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 377                "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 378                "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 379                "if test $? -ne 0; then "                               \
 380                        "echo PROGRAM FAILED; "                         \
 381                "else; "                                                \
 382                        "echo PROGRAM SUCCEEDED; "                      \
 383                "fi; "                                                  \
 384        "else; "                                                        \
 385                "echo DOWNLOAD FAILED; "                                \
 386        "fi;"
 387
 388#define CONFIG_PROG_UBOOT2                                              \
 389        "$download_cmd $loadaddr $ubootfile; "                          \
 390        "if test $? -eq 0; then "                                       \
 391                "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 392                "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 393                "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 394                "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 395                "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 396                "if test $? -ne 0; then "                               \
 397                        "echo PROGRAM FAILED; "                         \
 398                "else; "                                                \
 399                        "echo PROGRAM SUCCEEDED; "                      \
 400                "fi; "                                                  \
 401        "else; "                                                        \
 402                "echo DOWNLOAD FAILED; "                                \
 403        "fi;"
 404
 405#define CONFIG_BOOT_OS_NET                                              \
 406        "$download_cmd $osaddr $osfile; "                               \
 407        "if test $? -eq 0; then "                                       \
 408                "if test -n $fdtaddr; then "                            \
 409                        "$download_cmd $fdtaddr $fdtfile; "             \
 410                        "if test $? -eq 0; then "                       \
 411                                "bootm $osaddr - $fdtaddr; "            \
 412                        "else; "                                        \
 413                                "echo FDT DOWNLOAD FAILED; "            \
 414                        "fi; "                                          \
 415                "else; "                                                \
 416                        "bootm $osaddr; "                               \
 417                "fi; "                                                  \
 418        "else; "                                                        \
 419                "echo OS DOWNLOAD FAILED; "                             \
 420        "fi;"
 421
 422#define CONFIG_PROG_OS1                                                 \
 423        "$download_cmd $osaddr $osfile; "                               \
 424        "if test $? -eq 0; then "                                       \
 425                "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 426                "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 427                "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 428                "if test $? -ne 0; then "                               \
 429                        "echo OS PROGRAM FAILED; "                      \
 430                "else; "                                                \
 431                        "echo OS PROGRAM SUCCEEDED; "                   \
 432                "fi; "                                                  \
 433        "else; "                                                        \
 434                "echo OS DOWNLOAD FAILED; "                             \
 435        "fi;"
 436
 437#define CONFIG_PROG_OS2                                                 \
 438        "$download_cmd $osaddr $osfile; "                               \
 439        "if test $? -eq 0; then "                                       \
 440                "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 441                "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 442                "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 443                "if test $? -ne 0; then "                               \
 444                        "echo OS PROGRAM FAILED; "                      \
 445                "else; "                                                \
 446                        "echo OS PROGRAM SUCCEEDED; "                   \
 447                "fi; "                                                  \
 448        "else; "                                                        \
 449                "echo OS DOWNLOAD FAILED; "                             \
 450        "fi;"
 451
 452#define CONFIG_PROG_FDT1                                                \
 453        "$download_cmd $fdtaddr $fdtfile; "                             \
 454        "if test $? -eq 0; then "                                       \
 455                "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 456                "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 457                "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 458                "if test $? -ne 0; then "                               \
 459                        "echo FDT PROGRAM FAILED; "                     \
 460                "else; "                                                \
 461                        "echo FDT PROGRAM SUCCEEDED; "                  \
 462                "fi; "                                                  \
 463        "else; "                                                        \
 464                "echo FDT DOWNLOAD FAILED; "                            \
 465        "fi;"
 466
 467#define CONFIG_PROG_FDT2                                                \
 468        "$download_cmd $fdtaddr $fdtfile; "                             \
 469        "if test $? -eq 0; then "                                       \
 470                "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 471                "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 472                "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 473                "if test $? -ne 0; then "                               \
 474                        "echo FDT PROGRAM FAILED; "                     \
 475                "else; "                                                \
 476                        "echo FDT PROGRAM SUCCEEDED; "                  \
 477                "fi; "                                                  \
 478        "else; "                                                        \
 479                "echo FDT DOWNLOAD FAILED; "                            \
 480        "fi;"
 481
 482#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 483        "autoload=yes\0"                                                \
 484        "download_cmd=tftp\0"                                           \
 485        "console_args=console=ttyS0,115200\0"                           \
 486        "root_args=root=/dev/nfs rw\0"                                  \
 487        "misc_args=ip=on\0"                                             \
 488        "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 489        "bootfile=/home/user/file\0"                                    \
 490        "osfile=/home/user/board.uImage\0"                              \
 491        "fdtfile=/home/user/board.dtb\0"                                \
 492        "ubootfile=/home/user/u-boot.bin\0"                             \
 493        "fdtaddr=0x1e00000\0"                                           \
 494        "osaddr=0x1000000\0"                                            \
 495        "loadaddr=0x1000000\0"                                          \
 496        "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 497        "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 498        "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 499        "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 500        "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 501        "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 502        "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 503        "bootcmd_flash1=run set_bootargs; "                             \
 504                "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 505        "bootcmd_flash2=run set_bootargs; "                             \
 506                "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 507        "bootcmd=run bootcmd_flash1\0"
 508#endif  /* __CONFIG_H */
 509