LXR uboot/arch/m68k/cpu/mcf5445x/start.S

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2003   Josef Baumgartner <josef.baumgartner@telex.de>
   4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
   5 *
   6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
   7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   8 */
   9
  10#include <common.h>
  11#include <asm-offsets.h>
  12#include <config.h>
  13#include <timestamp.h>
  14#include "version.h"
  15#include <asm/cache.h>
  16
  17#define _START  _start
  18#define _FAULT  _fault
  19
  20#define SAVE_ALL                                                \
  21        move.w  #0x2700,%sr;            /* disable intrs */     \
  22        subl    #60,%sp;                /* space for 15 regs */ \
  23        moveml  %d0-%d7/%a0-%a6,%sp@;
  24
  25#define RESTORE_ALL                                             \
  26        moveml  %sp@,%d0-%d7/%a0-%a6;                           \
  27        addl    #60,%sp;                /* space for 15 regs */ \
  28        rte;
  29
  30#if defined(CONFIG_SERIAL_BOOT)
  31#define ASM_DRAMINIT    (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
  32        CONFIG_SYS_INIT_RAM_ADDR)
  33#define ASM_DRAMINIT_N  (asm_dram_init - CONFIG_SYS_TEXT_BASE)
  34#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
  35        CONFIG_SYS_INIT_RAM_ADDR)
  36#endif
  37
  38.text
  39
  40/*
  41 * Vector table. This is used for initial platform startup.
  42 * These vectors are to catch any un-intended traps.
  43 */
  44_vectors:
  45#if defined(CONFIG_SERIAL_BOOT)
  46
  47INITSP: .long   0                       /* Initial SP   */
  48#ifdef CONFIG_CF_SBF
  49INITPC: .long   ASM_DRAMINIT            /* Initial PC   */
  50#endif
  51#ifdef CONFIG_SYS_NAND_BOOT
  52INITPC: .long   ASM_DRAMINIT_N          /* Initial PC   */
  53#endif
  54
  55#else
  56
  57INITSP: .long   0                       /* Initial SP   */
  58INITPC: .long   _START                  /* Initial PC   */
  59
  60#endif
  61
  62vector02_0F:
  63.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  64.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  65
  66/* Reserved */
  67vector10_17:
  68.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  69
  70vector18_1F:
  71.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  72
  73#if !defined(CONFIG_SERIAL_BOOT)
  74
  75/* TRAP #0 - #15 */
  76vector20_2F:
  77.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  78.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  79
  80/* Reserved     */
  81vector30_3F:
  82.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  83.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  84
  85vector64_127:
  86.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  87.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  88.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  89.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  90.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  91.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  92.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  93.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  94
  95vector128_191:
  96.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  97.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  98.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  99.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 100.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 101.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 102.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 103.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 104
 105vector192_255:
 106.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 107.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 108.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 109.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 110.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 111.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 112.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 113.long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 114#endif
 115
 116#if defined(CONFIG_SERIAL_BOOT)
 117        /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
 118asm_sbf_img_hdr:
 119        .long   0x00000000              /* checksum, not yet implemented */
 120        .long   0x00040000              /* image length */
 121        .long   CONFIG_SYS_TEXT_BASE    /* image to be relocated at */
 122
 123asm_dram_init:
 124        move.w  #0x2700,%sr             /* Mask off Interrupt */
 125
 126#ifdef CONFIG_SYS_NAND_BOOT
 127        /* for assembly stack */
 128        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 129        movec   %d0, %RAMBAR1
 130
 131        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
 132        clr.l   %sp@-
 133#endif
 134
 135#ifdef CONFIG_CF_SBF
 136        move.l  #CONFIG_SYS_INIT_RAM_ADDR, %d0
 137        movec   %d0, %VBR
 138
 139        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 140        movec   %d0, %RAMBAR1
 141
 142        /* initialize general use internal ram */
 143        move.l  #0, %d0
 144        move.l  #(ICACHE_STATUS), %a1   /* icache */
 145        move.l  #(DCACHE_STATUS), %a2   /* dcache */
 146        move.l  %d0, (%a1)
 147        move.l  %d0, (%a2)
 148
 149        /* invalidate and disable cache */
 150        move.l  #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
 151        movec   %d0, %CACR              /* Invalidate cache */
 152        move.l  #0, %d0
 153        movec   %d0, %ACR0
 154        movec   %d0, %ACR1
 155        movec   %d0, %ACR2
 156        movec   %d0, %ACR3
 157
 158        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
 159        clr.l   %sp@-
 160
 161#ifdef CONFIG_SYS_CS0_BASE
 162        /* Must disable global address */
 163        move.l  #0xFC008000, %a1
 164        move.l  #(CONFIG_SYS_CS0_BASE), (%a1)
 165        move.l  #0xFC008008, %a1
 166        move.l  #(CONFIG_SYS_CS0_CTRL), (%a1)
 167        move.l  #0xFC008004, %a1
 168        move.l  #(CONFIG_SYS_CS0_MASK), (%a1)
 169#endif
 170#endif /* CONFIG_CF_SBF */
 171
 172#ifdef CONFIG_MCF5441x
 173        /* TC: enable all peripherals,
 174        in the future only enable certain peripherals */
 175        move.l  #0xFC04002D, %a1
 176
 177#if defined(CONFIG_CF_SBF)
 178        move.b  #23, (%a1)              /* dspi */
 179#endif
 180#endif  /* CONFIG_MCF5441x */
 181
 182        /* mandatory board level ddr-sdram init,
 183         * for both 5441x and 5445x
 184         */
 185        bsr     sbf_dram_init
 186
 187#ifdef CONFIG_CF_SBF
 188        /*
 189         * DSPI Initialization
 190         * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
 191         * a1 - dspi status
 192         * a2 - dtfr
 193         * a3 - drfr
 194         * a4 - Dst addr
 195         */
 196        /* Enable pins for DSPI mode - chip-selects are enabled later */
 197asm_dspi_init:
 198#ifdef CONFIG_MCF5441x
 199        move.l  #0xEC09404E, %a1
 200        move.l  #0xEC09404F, %a2
 201        move.b  #0xFF, (%a1)
 202        move.b  #0x80, (%a2)
 203#endif
 204
 205#ifdef CONFIG_MCF5445x
 206        move.l  #0xFC0A4063, %a0
 207        move.b  #0x7F, (%a0)
 208#endif
 209        /* Configure DSPI module */
 210        move.l  #0xFC05C000, %a0
 211        move.l  #0x80FF0C00, (%a0)      /* Master, clear TX/RX FIFO */
 212
 213        move.l  #0xFC05C00C, %a0
 214#ifdef CONFIG_MCF5441x
 215        move.l  #0x3E000016, (%a0)
 216#endif
 217#ifdef CONFIG_MCF5445x
 218        move.l  #0x3E000011, (%a0)
 219#endif
 220
 221        move.l  #0xFC05C034, %a2        /* dtfr */
 222        move.l  #0xFC05C03B, %a3        /* drfr */
 223
 224        move.l  #(ASM_SBF_IMG_HDR + 4), %a1
 225        move.l  (%a1)+, %d5
 226        move.l  (%a1), %a4
 227
 228        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
 229        move.l  #(CONFIG_SYS_SBFHDR_SIZE), %d4
 230
 231        move.l  #0xFC05C02C, %a1        /* dspi status */
 232
 233        /* Issue commands and address */
 234        move.l  #0x8002000B, %d2        /* Fast Read Cmd */
 235        jsr     asm_dspi_wr_status
 236        jsr     asm_dspi_rd_status
 237
 238        move.l  #0x80020000, %d2        /* Address byte 2 */
 239        jsr     asm_dspi_wr_status
 240        jsr     asm_dspi_rd_status
 241
 242        move.l  #0x80020000, %d2        /* Address byte 1 */
 243        jsr     asm_dspi_wr_status
 244        jsr     asm_dspi_rd_status
 245
 246        move.l  #0x80020000, %d2        /* Address byte 0 */
 247        jsr     asm_dspi_wr_status
 248        jsr     asm_dspi_rd_status
 249
 250        move.l  #0x80020000, %d2        /* Dummy Wr and Rd */
 251        jsr     asm_dspi_wr_status
 252        jsr     asm_dspi_rd_status
 253
 254        /* Transfer serial boot header to sram */
 255asm_dspi_rd_loop1:
 256        move.l  #0x80020000, %d2
 257        jsr     asm_dspi_wr_status
 258        jsr     asm_dspi_rd_status
 259
 260        move.b  %d1, (%a0)              /* read, copy to dst */
 261
 262        add.l   #1, %a0                 /* inc dst by 1 */
 263        sub.l   #1, %d4                 /* dec cnt by 1 */
 264        bne     asm_dspi_rd_loop1
 265
 266        /* Transfer u-boot from serial flash to memory */
 267asm_dspi_rd_loop2:
 268        move.l  #0x80020000, %d2
 269        jsr     asm_dspi_wr_status
 270        jsr     asm_dspi_rd_status
 271
 272        move.b  %d1, (%a4)              /* read, copy to dst */
 273
 274        add.l   #1, %a4                 /* inc dst by 1 */
 275        sub.l   #1, %d5                 /* dec cnt by 1 */
 276        bne     asm_dspi_rd_loop2
 277
 278        move.l  #0x00020000, %d2        /* Terminate */
 279        jsr     asm_dspi_wr_status
 280        jsr     asm_dspi_rd_status
 281
 282        /* jump to memory and execute */
 283        move.l  #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
 284        jmp     (%a0)
 285
 286asm_dspi_wr_status:
 287        move.l  (%a1), %d0              /* status */
 288        and.l   #0x0000F000, %d0
 289        cmp.l   #0x00003000, %d0
 290        bgt     asm_dspi_wr_status
 291
 292        move.l  %d2, (%a2)
 293        rts
 294
 295asm_dspi_rd_status:
 296        move.l  (%a1), %d0              /* status */
 297        and.l   #0x000000F0, %d0
 298        lsr.l   #4, %d0
 299        cmp.l   #0, %d0
 300        beq     asm_dspi_rd_status
 301
 302        move.b  (%a3), %d1
 303        rts
 304#endif /* CONFIG_CF_SBF */
 305
 306#ifdef CONFIG_SYS_NAND_BOOT
 307        /* copy 4 boot pages to dram as soon as possible */
 308        /* each page is 996 bytes (1056 total with 60 ECC bytes */
 309        move.l  #0x00000000, %a1        /* src */
 310        move.l  #CONFIG_SYS_TEXT_BASE, %a2              /* dst */
 311        move.l  #0x3E0, %d0             /* sz in long */
 312
 313asm_boot_nand_copy:
 314        move.l  (%a1)+, (%a2)+
 315        subq.l  #1, %d0
 316        bne     asm_boot_nand_copy
 317
 318        /* jump to memory and execute */
 319        move.l  #(asm_nand_init), %a0
 320        jmp     (%a0)
 321
 322asm_nand_init:
 323        /* exit nand boot-mode */
 324        move.l  #0xFC0FFF30, %a1
 325        or.l    #0x00000040, %d1
 326        move.l  %d1, (%a1)
 327
 328        /* initialize general use internal ram */
 329        move.l  #0, %d0
 330        move.l  #(CACR_STATUS), %a1     /* CACR */
 331        move.l  #(ICACHE_STATUS), %a2   /* icache */
 332        move.l  #(DCACHE_STATUS), %a3   /* dcache */
 333        move.l  %d0, (%a1)
 334        move.l  %d0, (%a2)
 335        move.l  %d0, (%a3)
 336
 337        /* invalidate and disable cache */
 338        move.l  #0x01004100, %d0        /* Invalidate cache cmd */
 339        movec   %d0, %CACR              /* Invalidate cache */
 340        move.l  #0, %d0
 341        movec   %d0, %ACR0
 342        movec   %d0, %ACR1
 343        movec   %d0, %ACR2
 344        movec   %d0, %ACR3
 345
 346#ifdef CONFIG_SYS_CS0_BASE
 347        /* Must disable global address */
 348        move.l  #0xFC008000, %a1
 349        move.l  #(CONFIG_SYS_CS0_BASE), (%a1)
 350        move.l  #0xFC008008, %a1
 351        move.l  #(CONFIG_SYS_CS0_CTRL), (%a1)
 352        move.l  #0xFC008004, %a1
 353        move.l  #(CONFIG_SYS_CS0_MASK), (%a1)
 354#endif
 355
 356        /* NAND port configuration */
 357        move.l  #0xEC094048, %a1
 358        move.b  #0xFD, (%a1)+
 359        move.b  #0x5F, (%a1)+
 360        move.b  #0x04, (%a1)+
 361
 362        /* reset nand */
 363        move.l  #0xFC0FFF38, %a1        /* isr */
 364        move.l  #0x000e0000, (%a1)
 365        move.l  #0xFC0FFF08, %a2
 366        move.l  #0x00000000, (%a2)+     /* car */
 367        move.l  #0x11000000, (%a2)+     /* rar */
 368        move.l  #0x00000000, (%a2)+     /* rpt */
 369        move.l  #0x00000000, (%a2)+     /* rai */
 370        move.l  #0xFC0FFF2c, %a2        /* cfg */
 371        move.l  #0x00000000, (%a2)+     /* secsz */
 372        move.l  #0x000e0681, (%a2)+
 373        move.l  #0xFC0FFF04, %a2        /* cmd2 */
 374        move.l  #0xFF404001, (%a2)
 375        move.l  #0x000e0000, (%a1)
 376
 377        move.l  #0x2000, %d1
 378        bsr     asm_delay
 379
 380        /* setup nand */
 381        move.l  #0xFC0FFF00, %a1
 382        move.l  #0x30700000, (%a1)+     /* cmd1 */
 383        move.l  #0x007EF000, (%a1)+     /* cmd2 */
 384
 385        move.l  #0xFC0FFF2C, %a1
 386        move.l  #0x00000841, (%a1)+     /* secsz */
 387        move.l  #0x000e0681, (%a1)+     /* cfg */
 388
 389        move.l  #100, %d4               /* 100 pages ~200KB */
 390        move.l  #4, %d2                 /* start at 4 */
 391        move.l  #0xFC0FFF04, %a0        /* cmd2 */
 392        move.l  #0xFC0FFF0C, %a1        /* rar */
 393        move.l  #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
 394
 395asm_nand_read:
 396        move.l  #0x11000000, %d0        /* rar */
 397        or.l    %d2, %d0
 398        move.l  %d0, (%a1)
 399        add.l   #1, %d2
 400
 401        move.l  (%a0), %d0              /* cmd2 */
 402        or.l    #1, %d0
 403        move.l  %d0, (%a0)
 404
 405        move.l  #0x200, %d1
 406        bsr     asm_delay
 407
 408asm_nand_chk_status:
 409        move.l  #0xFC0FFF38, %a4        /* isr */
 410        move.l  (%a4), %d0
 411        and.l   #0x40000000, %d0
 412        tst.l   %d0
 413        beq     asm_nand_chk_status
 414
 415        move.l  #0xFC0FFF38, %a4        /* isr */
 416        move.l  (%a4), %d0
 417        or.l    #0x000E0000, %d0
 418        move.l  %d0, (%a4)
 419
 420        move.l  #0x200, %d3
 421        move.l  #0xFC0FC000, %a3        /* buf 1 */
 422asm_nand_copy:
 423        move.l  (%a3)+, (%a2)+
 424        subq.l  #1, %d3
 425        bgt     asm_nand_copy
 426
 427        subq.l  #1, %d4
 428        bgt     asm_nand_read
 429
 430        /* jump to memory and execute */
 431        move.l  #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
 432        jmp     (%a0)
 433
 434#endif                  /* CONFIG_SYS_NAND_BOOT */
 435
 436.globl asm_delay
 437asm_delay:
 438        nop
 439        subq.l  #1, %d1
 440        bne     asm_delay
 441        rts
 442#endif                  /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
 443
 444.text
 445        . = 0x400
 446.globl _start
 447_start:
 448#if !defined(CONFIG_SERIAL_BOOT)
 449        nop
 450        nop
 451        move.w  #0x2700,%sr             /* Mask off Interrupt */
 452
 453        /* Set vector base register at the beginning of the Flash */
 454        move.l  #CONFIG_SYS_FLASH_BASE, %d0
 455        movec   %d0, %VBR
 456
 457        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 458        movec   %d0, %RAMBAR1
 459
 460        /* initialize general use internal ram */
 461        move.l  #0, %d0
 462        move.l  #(ICACHE_STATUS), %a1   /* icache */
 463        move.l  #(DCACHE_STATUS), %a2   /* dcache */
 464        move.l  %d0, (%a1)
 465        move.l  %d0, (%a2)
 466
 467        /* invalidate and disable cache */
 468        move.l  #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
 469        movec   %d0, %CACR              /* Invalidate cache */
 470        move.l  #0, %d0
 471        movec   %d0, %ACR0
 472        movec   %d0, %ACR1
 473        movec   %d0, %ACR2
 474        movec   %d0, %ACR3
 475#else
 476        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 477        movec   %d0, %RAMBAR1
 478#endif
 479
 480        /* put relocation table address to a5 */
 481        move.l  #__got_start, %a5
 482
 483        /* setup stack initially on top of internal static ram  */
 484        move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
 485
 486        /*
 487         * if configured, malloc_f arena will be reserved first,
 488         * then (and always) gd struct space will be reserved
 489         */
 490        move.l  %sp, -(%sp)
 491        move.l  #board_init_f_alloc_reserve, %a1
 492        jsr     (%a1)
 493
 494        /* update stack and frame-pointers */
 495        move.l  %d0, %sp
 496        move.l  %sp, %fp
 497
 498        /* initialize reserved area */
 499        move.l  %d0, -(%sp)
 500        move.l  #board_init_f_init_reserve, %a1
 501        jsr     (%a1)
 502
 503        /* run low-level CPU init code (from flash) */
 504        move.l  #cpu_init_f, %a1
 505        jsr     (%a1)
 506
 507        /* run low-level board init code (from flash) */
 508        clr.l   %sp@-
 509        move.l  #board_init_f, %a1
 510        jsr     (%a1)
 511
 512        /* board_init_f() does not return */
 513
 514/******************************************************************************/
 515
 516/*
 517 * void relocate_code (addr_sp, gd, addr_moni)
 518 *
 519 * This "function" does not return, instead it continues in RAM
 520 * after relocating the monitor code.
 521 *
 522 * r3 = dest
 523 * r4 = src
 524 * r5 = length in bytes
 525 * r6 = cachelinesize
 526 */
 527.globl relocate_code
 528relocate_code:
 529        link.w  %a6,#0
 530        move.l  8(%a6), %sp             /* set new stack pointer */
 531
 532        move.l  12(%a6), %d0            /* Save copy of Global Data pointer */
 533        move.l  16(%a6), %a0            /* Save copy of Destination Address */
 534
 535        move.l  #CONFIG_SYS_MONITOR_BASE, %a1
 536        move.l  #__init_end, %a2
 537        move.l  %a0, %a3
 538
 539        /* copy the code to RAM */
 5401:
 541        move.l  (%a1)+, (%a3)+
 542        cmp.l   %a1,%a2
 543        bgt.s   1b
 544
 545/*
 546 * We are done. Do not return, instead branch to second part of board
 547 * initialization, now running from RAM.
 548 */
 549        move.l  %a0, %a1
 550        add.l   #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
 551        jmp     (%a1)
 552
 553in_ram:
 554
 555clear_bss:
 556        /*
 557         * Now clear BSS segment
 558         */
 559        move.l  %a0, %a1
 560        add.l   #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
 561        move.l  %a0, %d1
 562        add.l   #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
 5636:
 564        clr.l   (%a1)+
 565        cmp.l   %a1,%d1
 566        bgt.s   6b
 567
 568        /*
 569         * fix got table in RAM
 570         */
 571        move.l  %a0, %a1
 572        add.l   #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
 573        move.l  %a1,%a5                 /* fix got pointer register a5 */
 574
 575        move.l  %a0, %a2
 576        add.l   #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
 577
 5787:
 579        move.l  (%a1),%d1
 580        sub.l   #_start,%d1
 581        add.l   %a0,%d1
 582        move.l  %d1,(%a1)+
 583        cmp.l   %a2, %a1
 584        bne     7b
 585
 586        /* calculate relative jump to board_init_r in ram */
 587        move.l  %a0, %a1
 588        add.l   #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
 589
 590        /* set parameters for board_init_r */
 591        move.l  %a0,-(%sp)              /* dest_addr */
 592        move.l  %d0,-(%sp)              /* gd */
 593        jsr     (%a1)
 594
 595/******************************************************************************/
 596
 597/* exception code */
 598.globl _fault
 599_fault:
 600        bra     _fault
 601
 602.globl _exc_handler
 603_exc_handler:
 604        SAVE_ALL
 605        movel   %sp,%sp@-
 606        bsr     exc_handler
 607        addql   #4,%sp
 608        RESTORE_ALL
 609
 610.globl _int_handler
 611_int_handler:
 612        SAVE_ALL
 613        movel   %sp,%sp@-
 614        bsr     int_handler
 615        addql   #4,%sp
 616        RESTORE_ALL
 617
 618/******************************************************************************/
 619
 620.globl version_string
 621version_string:
 622.ascii U_BOOT_VERSION_STRING, "\0"
 623.align 4
 624