1/* 2 * include/asm-microblaze/ptrace.h -- Access to CPU registers 3 * 4 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> 5 * Copyright (C) 2001,2002 NEC Corporation 6 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> 7 * 8 * This file is subject to the terms and conditions of the GNU General 9 * Public License. See the file COPYING in the main directory of this 10 * archive for more details. 11 * 12 * Written by Miles Bader <miles@gnu.org> 13 * Microblaze port by John Williams 14 */ 15 16#ifndef __MICROBLAZE_PTRACE_H__ 17#define __MICROBLAZE_PTRACE_H__ 18 19 20/* Microblaze general purpose registers with special meanings. */ 21#define GPR_ZERO 0 /* constant zero */ 22#define GPR_ASM 18 /* reserved for assembler */ 23#define GPR_SP 1 /* stack pointer */ 24#define GPR_GP 2 /* global data pointer */ 25#define GPR_EP 30 /* `element pointer' */ 26#define GPR_LP 15 /* link pointer (current return address) */ 27 28/* These aren't official names, but they make some code more descriptive. */ 29#define GPR_ARG0 5 30#define GPR_ARG1 6 31#define GPR_ARG2 7 32#define GPR_ARG3 8 33#define GPR_ARG4 9 34#define GPR_ARG5 10 35#define GPR_RVAL0 3 36#define GPR_RVAL1 4 37#define GPR_RVAL GPR_RVAL0 38 39#define NUM_GPRS 32 40 41/* `system' registers. */ 42/* Note these are old v850 values, microblaze has many fewer */ 43#define SR_EIPC 0 44#define SR_EIPSW 1 45#define SR_FEPC 2 46#define SR_FEPSW 3 47#define SR_ECR 4 48#define SR_PSW 5 49#define SR_CTPC 16 50#define SR_CTPSW 17 51#define SR_DBPC 18 52#define SR_DBPSW 19 53#define SR_CTBP 20 54#define SR_DIR 21 55#define SR_ASID 23 56 57 58#ifndef __ASSEMBLY__ 59 60typedef unsigned long microblaze_reg_t; 61 62/* How processor state is stored on the stack during a syscall/signal. 63 If you change this structure, change the associated assembly-language 64 macros below too (PT_*)! */ 65struct pt_regs 66{ 67 /* General purpose registers. */ 68 microblaze_reg_t gpr[NUM_GPRS]; 69 70 microblaze_reg_t pc; /* program counter */ 71 microblaze_reg_t psw; /* program status word */ 72 73 microblaze_reg_t kernel_mode; /* 1 if in `kernel mode', 0 if user mode */ 74 microblaze_reg_t single_step; /* 1 if in single step mode */ 75}; 76 77 78#define instruction_pointer(regs) ((regs)->pc) 79#define user_mode(regs) (!(regs)->kernel_mode) 80 81/* When a struct pt_regs is used to save user state for a system call in 82 the kernel, the system call is stored in the space for R0 (since it's 83 never used otherwise, R0 being a constant 0). Non-system-calls 84 simply store 0 there. */ 85#define PT_REGS_SYSCALL(regs) (regs)->gpr[0] 86#define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val)) 87 88#endif /* !__ASSEMBLY__ */ 89 90 91/* The number of bytes used to store each register. */ 92#define _PT_REG_SIZE 4 93 94/* Offset of a general purpose register in a stuct pt_regs. */ 95#define PT_GPR(num) ((num) * _PT_REG_SIZE) 96 97/* Offsets of various special registers & fields in a struct pt_regs. */ 98#define NUM_SPECIAL 4 99#define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE) 100#define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE) 101#define PT_KERNEL_MODE ((NUM_GPRS + 2) * _PT_REG_SIZE) 102#define PT_SINGLESTEP ((NUM_GPRS + 3) * _PT_REG_SIZE) 103 104#define PT_SYSCALL PT_GPR(0) 105 106/* Size of struct pt_regs, including alignment. */ 107#define PT_SIZE ((NUM_GPRS + NUM_SPECIAL) * _PT_REG_SIZE) 108 109/* These are `magic' values for PTRACE_PEEKUSR that return info about where 110 a process is located in memory. */ 111#define PT_TEXT_ADDR (PT_SIZE + 1) 112#define PT_TEXT_LEN (PT_SIZE + 2) 113#define PT_DATA_ADDR (PT_SIZE + 3) 114#define PT_DATA_LEN (PT_SIZE + 4) 115 116#endif /* __MICROBLAZE_PTRACE_H__ */ 117