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9#include <common.h>
10#include <dm.h>
11#include <errno.h>
12#include <pci.h>
13#include <asm/test.h>
14#include <linux/ctype.h>
15
16
17
18
19
20
21
22struct swap_case_platdata {
23 u16 command;
24 u32 bar[6];
25};
26
27#define offset_to_barnum(offset) \
28 (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32))
29
30enum {
31 MEM_TEXT_SIZE = 0x100,
32};
33
34enum swap_case_op {
35 OP_TO_LOWER,
36 OP_TO_UPPER,
37 OP_SWAP,
38};
39
40static struct pci_bar {
41 int type;
42 u32 size;
43} barinfo[] = {
44 { PCI_BASE_ADDRESS_SPACE_IO, 1 },
45 { PCI_BASE_ADDRESS_MEM_TYPE_32, MEM_TEXT_SIZE },
46 { 0, 0 },
47 { 0, 0 },
48 { 0, 0 },
49 { 0, 0 },
50};
51
52struct swap_case_priv {
53 enum swap_case_op op;
54 char mem_text[MEM_TEXT_SIZE];
55};
56
57static int sandbox_swap_case_get_devfn(struct udevice *dev)
58{
59 struct pci_child_platdata *plat = dev_get_parent_platdata(dev);
60
61 return plat->devfn;
62}
63
64static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,
65 ulong *valuep, enum pci_size_t size)
66{
67 struct swap_case_platdata *plat = dev_get_platdata(emul);
68
69 switch (offset) {
70 case PCI_COMMAND:
71 *valuep = plat->command;
72 break;
73 case PCI_HEADER_TYPE:
74 *valuep = 0;
75 break;
76 case PCI_VENDOR_ID:
77 *valuep = SANDBOX_PCI_VENDOR_ID;
78 break;
79 case PCI_DEVICE_ID:
80 *valuep = SANDBOX_PCI_DEVICE_ID;
81 break;
82 case PCI_CLASS_DEVICE:
83 if (size == PCI_SIZE_8) {
84 *valuep = SANDBOX_PCI_CLASS_SUB_CODE;
85 } else {
86 *valuep = (SANDBOX_PCI_CLASS_CODE << 8) |
87 SANDBOX_PCI_CLASS_SUB_CODE;
88 }
89 break;
90 case PCI_CLASS_CODE:
91 *valuep = SANDBOX_PCI_CLASS_CODE;
92 break;
93 case PCI_BASE_ADDRESS_0:
94 case PCI_BASE_ADDRESS_1:
95 case PCI_BASE_ADDRESS_2:
96 case PCI_BASE_ADDRESS_3:
97 case PCI_BASE_ADDRESS_4:
98 case PCI_BASE_ADDRESS_5: {
99 int barnum;
100 u32 *bar, result;
101
102 barnum = offset_to_barnum(offset);
103 bar = &plat->bar[barnum];
104
105 result = *bar;
106 if (*bar == 0xffffffff) {
107 if (barinfo[barnum].type) {
108 result = (~(barinfo[barnum].size - 1) &
109 PCI_BASE_ADDRESS_IO_MASK) |
110 PCI_BASE_ADDRESS_SPACE_IO;
111 } else {
112 result = (~(barinfo[barnum].size - 1) &
113 PCI_BASE_ADDRESS_MEM_MASK) |
114 PCI_BASE_ADDRESS_MEM_TYPE_32;
115 }
116 }
117 debug("r bar %d=%x\n", barnum, result);
118 *valuep = result;
119 break;
120 }
121 case PCI_CAPABILITY_LIST:
122 *valuep = PCI_CAP_ID_PM_OFFSET;
123 break;
124 case PCI_CAP_ID_PM_OFFSET:
125 *valuep = (PCI_CAP_ID_EXP_OFFSET << 8) | PCI_CAP_ID_PM;
126 break;
127 case PCI_CAP_ID_EXP_OFFSET:
128 *valuep = (PCI_CAP_ID_MSIX_OFFSET << 8) | PCI_CAP_ID_EXP;
129 break;
130 case PCI_CAP_ID_MSIX_OFFSET:
131 *valuep = PCI_CAP_ID_MSIX;
132 break;
133 case PCI_EXT_CAP_ID_ERR_OFFSET:
134 *valuep = (PCI_EXT_CAP_ID_VC_OFFSET << 20) | PCI_EXT_CAP_ID_ERR;
135 break;
136 case PCI_EXT_CAP_ID_VC_OFFSET:
137 *valuep = (PCI_EXT_CAP_ID_DSN_OFFSET << 20) | PCI_EXT_CAP_ID_VC;
138 break;
139 case PCI_EXT_CAP_ID_DSN_OFFSET:
140 *valuep = PCI_EXT_CAP_ID_DSN;
141 break;
142 }
143
144 return 0;
145}
146
147static int sandbox_swap_case_write_config(struct udevice *emul, uint offset,
148 ulong value, enum pci_size_t size)
149{
150 struct swap_case_platdata *plat = dev_get_platdata(emul);
151
152 switch (offset) {
153 case PCI_COMMAND:
154 plat->command = value;
155 break;
156 case PCI_BASE_ADDRESS_0:
157 case PCI_BASE_ADDRESS_1: {
158 int barnum;
159 u32 *bar;
160
161 barnum = offset_to_barnum(offset);
162 bar = &plat->bar[barnum];
163
164 debug("w bar %d=%lx\n", barnum, value);
165 *bar = value;
166
167 *bar |= barinfo[barnum].type;
168 break;
169 }
170 }
171
172 return 0;
173}
174
175static int sandbox_swap_case_find_bar(struct udevice *emul, unsigned int addr,
176 int *barnump, unsigned int *offsetp)
177{
178 struct swap_case_platdata *plat = dev_get_platdata(emul);
179 int barnum;
180
181 for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
182 unsigned int size = barinfo[barnum].size;
183 u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE;
184
185 if (addr >= base && addr < base + size) {
186 *barnump = barnum;
187 *offsetp = addr - base;
188 return 0;
189 }
190 }
191 *barnump = -1;
192
193 return -ENOENT;
194}
195
196static void sandbox_swap_case_do_op(enum swap_case_op op, char *str, int len)
197{
198 for (; len > 0; len--, str++) {
199 switch (op) {
200 case OP_TO_UPPER:
201 *str = toupper(*str);
202 break;
203 case OP_TO_LOWER:
204 *str = tolower(*str);
205 break;
206 case OP_SWAP:
207 if (isupper(*str))
208 *str = tolower(*str);
209 else
210 *str = toupper(*str);
211 break;
212 }
213 }
214}
215
216int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr,
217 ulong *valuep, enum pci_size_t size)
218{
219 struct swap_case_priv *priv = dev_get_priv(dev);
220 unsigned int offset;
221 int barnum;
222 int ret;
223
224 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
225 if (ret)
226 return ret;
227
228 if (barnum == 0 && offset == 0)
229 *valuep = (*valuep & ~0xff) | priv->op;
230
231 return 0;
232}
233
234int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr,
235 ulong value, enum pci_size_t size)
236{
237 struct swap_case_priv *priv = dev_get_priv(dev);
238 unsigned int offset;
239 int barnum;
240 int ret;
241
242 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
243 if (ret)
244 return ret;
245 if (barnum == 0 && offset == 0)
246 priv->op = value;
247
248 return 0;
249}
250
251static int sandbox_swap_case_map_physmem(struct udevice *dev,
252 phys_addr_t addr, unsigned long *lenp, void **ptrp)
253{
254 struct swap_case_priv *priv = dev_get_priv(dev);
255 unsigned int offset, avail;
256 int barnum;
257 int ret;
258
259 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
260 if (ret)
261 return ret;
262 if (barnum == 1) {
263 *ptrp = priv->mem_text + offset;
264 avail = barinfo[1].size - offset;
265 if (avail > barinfo[1].size)
266 *lenp = 0;
267 else
268 *lenp = min(*lenp, (ulong)avail);
269
270 return 0;
271 }
272
273 return -ENOENT;
274}
275
276static int sandbox_swap_case_unmap_physmem(struct udevice *dev,
277 const void *vaddr, unsigned long len)
278{
279 struct swap_case_priv *priv = dev_get_priv(dev);
280
281 sandbox_swap_case_do_op(priv->op, (void *)vaddr, len);
282
283 return 0;
284}
285
286struct dm_pci_emul_ops sandbox_swap_case_emul_ops = {
287 .get_devfn = sandbox_swap_case_get_devfn,
288 .read_config = sandbox_swap_case_read_config,
289 .write_config = sandbox_swap_case_write_config,
290 .read_io = sandbox_swap_case_read_io,
291 .write_io = sandbox_swap_case_write_io,
292 .map_physmem = sandbox_swap_case_map_physmem,
293 .unmap_physmem = sandbox_swap_case_unmap_physmem,
294};
295
296static const struct udevice_id sandbox_swap_case_ids[] = {
297 { .compatible = "sandbox,swap-case" },
298 { }
299};
300
301U_BOOT_DRIVER(sandbox_swap_case_emul) = {
302 .name = "sandbox_swap_case_emul",
303 .id = UCLASS_PCI_EMUL,
304 .of_match = sandbox_swap_case_ids,
305 .ops = &sandbox_swap_case_emul_ops,
306 .priv_auto_alloc_size = sizeof(struct swap_case_priv),
307 .platdata_auto_alloc_size = sizeof(struct swap_case_platdata),
308};
309
310static struct pci_device_id sandbox_swap_case_supported[] = {
311 { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA },
312 {},
313};
314
315U_BOOT_PCI_DEVICE(sandbox_swap_case_emul, sandbox_swap_case_supported);
316
