LXR uboot/include/configs/vining

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2016 samtec automotive software & electronics gmbh
   4 *
   5 * Configuration settings for the Samtec VIN|ING 2000 board.
   6 */
   7
   8#ifndef __CONFIG_H
   9#define __CONFIG_H
  10
  11#include "mx6_common.h"
  12
  13#ifdef CONFIG_SPL
  14#include "imx6_spl.h"
  15#endif
  16
  17/* Size of malloc() pool */
  18#define CONFIG_SYS_MALLOC_LEN           (3 * SZ_1M)
  19
  20#define CONFIG_MXC_UART
  21#define CONFIG_MXC_UART_BASE            UART1_BASE
  22
  23#define BOOT_TARGET_DEVICES(func) \
  24        func(MMC, mmc, 0) \
  25        func(MMC, mmc, 1) \
  26        func(USB, usb, 0) \
  27        func(PXE, pxe, na) \
  28        func(DHCP, dhcp, na)
  29#include <config_distro_bootcmd.h>
  30
  31/* Miscellaneous configurable options */
  32#define CONFIG_SYS_MEMTEST_START        0x80000000
  33#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000)
  34
  35/* Physical Memory Map */
  36#define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  37
  38#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  39#define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  40#define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  41
  42#define CONFIG_SYS_INIT_SP_OFFSET \
  43        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  44#define CONFIG_SYS_INIT_SP_ADDR \
  45        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  46
  47/* MMC Configuration */
  48#define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
  49
  50/* I2C Configs */
  51#define CONFIG_SYS_I2C
  52#define CONFIG_SYS_I2C_MXC
  53#define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  54#define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  55#define CONFIG_SYS_I2C_SPEED              100000
  56
  57/* PMIC */
  58#define CONFIG_POWER
  59#define CONFIG_POWER_I2C
  60#define CONFIG_POWER_PFUZE100
  61#define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
  62
  63/* Network */
  64#define CONFIG_FEC_MXC
  65
  66#define IMX_FEC_BASE                    ENET_BASE_ADDR
  67#define CONFIG_FEC_MXC_PHYADDR          0x0
  68
  69#define CONFIG_FEC_XCV_TYPE             RMII
  70#define CONFIG_ETHPRIME                 "FEC"
  71
  72#define CONFIG_PHY_ATHEROS
  73
  74#ifdef CONFIG_CMD_USB
  75#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  76#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
  77#define CONFIG_MXC_USB_FLAGS   0
  78#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  79#endif
  80
  81#ifdef CONFIG_CMD_PCI
  82#define CONFIG_PCI_SCAN_SHOW
  83#define CONFIG_PCIE_IMX
  84#define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(4, 6)
  85#endif
  86
  87#define CONFIG_IMX_THERMAL
  88
  89#define CONFIG_PWM_IMX
  90#define CONFIG_IMX6_PWM_PER_CLK 66000000
  91
  92#define CONFIG_ENV_OFFSET               (8 * SZ_64K)
  93#define CONFIG_ENV_SIZE                 SZ_8K
  94#define CONFIG_ENV_OFFSET_REDUND        (9 * SZ_64K)
  95#define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
  96
  97#ifdef CONFIG_ENV_IS_IN_MMC
  98#define CONFIG_SUPPORT_EMMC_BOOT
  99#define CONFIG_SYS_MMC_ENV_DEV          0 /* USDHC4 eMMC */
 100/* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */
 101#define CONFIG_SYS_MMC_ENV_PART         1 /* boot0 */
 102#endif
 103
 104#endif                          /* __CONFIG_H */
 105