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10#ifndef _tsi148_h
11#define _tsi148_h
12
13#ifndef PCI_DEVICE_ID_TUNDRA_TSI148
14#define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148
15#endif
16
17typedef struct _TSI148 TSI148;
18typedef struct _OUTBOUND OUTBOUND;
19typedef struct _INBOUND INBOUND;
20typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
21
22struct _OUTBOUND {
23 unsigned int otsau;
24 unsigned int otsal;
25 unsigned int oteau;
26 unsigned int oteal;
27 unsigned int otofu;
28 unsigned int otofl;
29 unsigned int otbs;
30 unsigned int otat;
31};
32
33struct _INBOUND {
34 unsigned int itsau;
35 unsigned int itsal;
36 unsigned int iteau;
37 unsigned int iteal;
38 unsigned int itofu;
39 unsigned int itofl;
40 unsigned int itat;
41 unsigned int spare;
42};
43
44struct _TSI148 {
45 unsigned int pci_id;
46 unsigned int pci_csr;
47 unsigned int pci_class;
48 unsigned int pci_misc0;
49 unsigned int pci_mbarl;
50 unsigned int pci_mbarh;
51 unsigned int spare0[(0x03c-0x018)/4];
52 unsigned int pci_misc1;
53 unsigned int pci_pcixcap;
54 unsigned int pci_pcixstat;
55 unsigned int spare1[(0x100-0x048)/4];
56 OUTBOUND outbound[8];
57 unsigned int viack[8];
58 unsigned int rmwau;
59 unsigned int rmwal;
60 unsigned int rmwen;
61 unsigned int rmwc;
62 unsigned int rmws;
63 unsigned int vmctrl;
64 unsigned int vctrl;
65 unsigned int vstat;
66 unsigned int pcsr;
67 unsigned int spare2[3];
68 unsigned int vmefl;
69 unsigned int spare3[3];
70 unsigned int veau;
71 unsigned int veal;
72 unsigned int veat;
73 unsigned int spare4[1];
74 unsigned int edpau;
75 unsigned int edpal;
76 unsigned int edpxa;
77 unsigned int edpxs;
78 unsigned int edpat;
79 unsigned int spare5[31];
80 INBOUND inbound[8];
81 unsigned int gbau;
82 unsigned int gbal;
83 unsigned int gcsrat;
84 unsigned int cbau;
85 unsigned int cbal;
86 unsigned int crgat;
87 unsigned int crou;
88 unsigned int crol;
89 unsigned int crat;
90 unsigned int lmbau;
91 unsigned int lmbal;
92 unsigned int lmat;
93 unsigned int r64bcu;
94 unsigned int r64bcl;
95 unsigned int bpgtr;
96 unsigned int bpctr;
97 unsigned int vicr;
98 unsigned int spare6[1];
99 unsigned int inten;
100 unsigned int inteo;
101 unsigned int ints;
102 unsigned int intc;
103 unsigned int intm1;
104 unsigned int intm2;
105 unsigned int spare7[40];
106 unsigned int dctl0;
107 unsigned int dsta0;
108 unsigned int dcsau0;
109 unsigned int dcsal0;
110 unsigned int dcdau0;
111 unsigned int dcdal0;
112 unsigned int dclau0;
113 unsigned int dclal0;
114 unsigned int dsau0;
115 unsigned int dsal0;
116 unsigned int ddau0;
117 unsigned int ddal0;
118 unsigned int dsat0;
119 unsigned int ddat0;
120 unsigned int dnlau0;
121 unsigned int dnlal0;
122 unsigned int dcnt0;
123 unsigned int ddbs0;
124 unsigned int r20[14];
125 unsigned int dctl1;
126 unsigned int dsta1;
127 unsigned int dcsau1;
128 unsigned int dcsal1;
129 unsigned int dcdau1;
130 unsigned int dcdal1;
131 unsigned int dclau1;
132 unsigned int dclal1;
133 unsigned int dsau1;
134 unsigned int dsal1;
135 unsigned int ddau1;
136 unsigned int ddal1;
137 unsigned int dsat1;
138 unsigned int ddat1;
139 unsigned int dnlau1;
140 unsigned int dnlal1;
141 unsigned int dcnt1;
142 unsigned int ddbs1;
143 unsigned int r21[14];
144 unsigned int devi_veni_2;
145 unsigned int gctrl_ga_revid;
146 unsigned int semaphore0_1_2_3;
147 unsigned int semaphore4_5_6_7;
148 unsigned int mbox0;
149 unsigned int mbox1;
150 unsigned int mbox2;
151 unsigned int mbox3;
152 unsigned int r22[629];
153 unsigned int csrbcr;
154 unsigned int csrbsr;
155 unsigned int cbar;
156};
157
158#define IRQ_VOWN 0x0001
159#define IRQ_VIRQ1 0x0002
160#define IRQ_VIRQ2 0x0004
161#define IRQ_VIRQ3 0x0008
162#define IRQ_VIRQ4 0x0010
163#define IRQ_VIRQ5 0x0020
164#define IRQ_VIRQ6 0x0040
165#define IRQ_VIRQ7 0x0080
166#define IRQ_DMA 0x0100
167#define IRQ_LERR 0x0200
168#define IRQ_VERR 0x0400
169#define IRQ_res 0x0800
170#define IRQ_IACK 0x1000
171#define IRQ_SWINT 0x2000
172#define IRQ_SYSFAIL 0x4000
173#define IRQ_ACFAIL 0x8000
174
175struct _TDMA_CMD_PACKET {
176 unsigned int dctl;
177 unsigned int dtbc;
178 unsigned int dlv;
179 unsigned int res1;
180 unsigned int dva;
181 unsigned int res2;
182 unsigned int dcpp;
183 unsigned int res3;
184};
185
186#define VME_AM_A16 0x01
187#define VME_AM_A24 0x02
188#define VME_AM_A32 0x03
189#define VME_AM_Axx 0x03
190#define VME_AM_USR 0x04
191#define VME_AM_SUP 0x08
192#define VME_AM_DATA 0x10
193#define VME_AM_PROG 0x20
194#define VME_AM_Mxx (VME_AM_DATA | VME_AM_PROG)
195
196#define VME_FLAG_D8 0x01
197#define VME_FLAG_D16 0x02
198#define VME_FLAG_D32 0x03
199#define VME_FLAG_Dxx 0x03
200
201#endif
202