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7#include <common.h>
8#include <errno.h>
9#include <malloc.h>
10#include <part.h>
11#include <mmc.h>
12#include <spi.h>
13#include <crc.h>
14#include <linux/crc7.h>
15#include <asm/byteorder.h>
16
17
18#define R1_SPI_IDLE (1 << 0)
19#define R1_SPI_ERASE_RESET (1 << 1)
20#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
21#define R1_SPI_COM_CRC (1 << 3)
22#define R1_SPI_ERASE_SEQ (1 << 4)
23#define R1_SPI_ADDRESS (1 << 5)
24#define R1_SPI_PARAMETER (1 << 6)
25
26#define R1_SPI_ERROR (1 << 7)
27
28
29#define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
30#define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
31#define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
32#define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
33
34
35
36
37#define SPI_TOKEN_SINGLE 0xfe
38#define SPI_TOKEN_MULTI_WRITE 0xfc
39#define SPI_TOKEN_STOP_TRAN 0xfd
40
41
42#define MMC_SPI_CMD(x) (0x40 | (x & 0x3f))
43
44
45#define MMC_SPI_VOLTAGE (MMC_VDD_32_33 | MMC_VDD_33_34)
46#define MMC_SPI_MIN_CLOCK 400000
47
48
49#define CTOUT 8
50#define RTOUT 3000000
51#define WTOUT 3000000
52
53static uint mmc_spi_sendcmd(struct mmc *mmc, ushort cmdidx, u32 cmdarg)
54{
55 struct spi_slave *spi = mmc->priv;
56 u8 cmdo[7];
57 u8 r1;
58 int i;
59 cmdo[0] = 0xff;
60 cmdo[1] = MMC_SPI_CMD(cmdidx);
61 cmdo[2] = cmdarg >> 24;
62 cmdo[3] = cmdarg >> 16;
63 cmdo[4] = cmdarg >> 8;
64 cmdo[5] = cmdarg;
65 cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
66 spi_xfer(spi, sizeof(cmdo) * 8, cmdo, NULL, 0);
67 for (i = 0; i < CTOUT; i++) {
68 spi_xfer(spi, 1 * 8, NULL, &r1, 0);
69 if (i && (r1 & 0x80) == 0)
70 break;
71 }
72 debug("%s:cmd%d resp%d %x\n", __func__, cmdidx, i, r1);
73 return r1;
74}
75
76static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf,
77 u32 bcnt, u32 bsize)
78{
79 struct spi_slave *spi = mmc->priv;
80 u8 *buf = xbuf;
81 u8 r1;
82 u16 crc;
83 int i;
84 while (bcnt--) {
85 for (i = 0; i < RTOUT; i++) {
86 spi_xfer(spi, 1 * 8, NULL, &r1, 0);
87 if (r1 != 0xff)
88 break;
89 }
90 debug("%s:tok%d %x\n", __func__, i, r1);
91 if (r1 == SPI_TOKEN_SINGLE) {
92 spi_xfer(spi, bsize * 8, NULL, buf, 0);
93 spi_xfer(spi, 2 * 8, NULL, &crc, 0);
94#ifdef CONFIG_MMC_SPI_CRC_ON
95 if (be_to_cpu16(crc16_ccitt(0, buf, bsize)) != crc) {
96 debug("%s: CRC error\n", mmc->cfg->name);
97 r1 = R1_SPI_COM_CRC;
98 break;
99 }
100#endif
101 r1 = 0;
102 } else {
103 r1 = R1_SPI_ERROR;
104 break;
105 }
106 buf += bsize;
107 }
108 return r1;
109}
110
111static uint mmc_spi_writedata(struct mmc *mmc, const void *xbuf,
112 u32 bcnt, u32 bsize, int multi)
113{
114 struct spi_slave *spi = mmc->priv;
115 const u8 *buf = xbuf;
116 u8 r1;
117 u16 crc;
118 u8 tok[2];
119 int i;
120 tok[0] = 0xff;
121 tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
122 while (bcnt--) {
123#ifdef CONFIG_MMC_SPI_CRC_ON
124 crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
125#endif
126 spi_xfer(spi, 2 * 8, tok, NULL, 0);
127 spi_xfer(spi, bsize * 8, buf, NULL, 0);
128 spi_xfer(spi, 2 * 8, &crc, NULL, 0);
129 for (i = 0; i < CTOUT; i++) {
130 spi_xfer(spi, 1 * 8, NULL, &r1, 0);
131 if ((r1 & 0x10) == 0)
132 break;
133 }
134 debug("%s:tok%d %x\n", __func__, i, r1);
135 if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
136 for (i = 0; i < WTOUT; i++) {
137 spi_xfer(spi, 1 * 8, NULL, &r1, 0);
138 if (i && r1 == 0xff) {
139 r1 = 0;
140 break;
141 }
142 }
143 if (i == WTOUT) {
144 debug("%s:wtout %x\n", __func__, r1);
145 r1 = R1_SPI_ERROR;
146 break;
147 }
148 } else {
149 debug("%s: err %x\n", __func__, r1);
150 r1 = R1_SPI_COM_CRC;
151 break;
152 }
153 buf += bsize;
154 }
155 if (multi && bcnt == -1) {
156 tok[1] = SPI_TOKEN_STOP_TRAN;
157 spi_xfer(spi, 2 * 8, tok, NULL, 0);
158 for (i = 0; i < WTOUT; i++) {
159 spi_xfer(spi, 1 * 8, NULL, &r1, 0);
160 if (i && r1 == 0xff) {
161 r1 = 0;
162 break;
163 }
164 }
165 if (i == WTOUT) {
166 debug("%s:wstop %x\n", __func__, r1);
167 r1 = R1_SPI_ERROR;
168 }
169 }
170 return r1;
171}
172
173static int mmc_spi_request(struct mmc *mmc, struct mmc_cmd *cmd,
174 struct mmc_data *data)
175{
176 struct spi_slave *spi = mmc->priv;
177 u8 r1;
178 int i;
179 int ret = 0;
180 debug("%s:cmd%d %x %x\n", __func__,
181 cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
182 spi_claim_bus(spi);
183 spi_cs_activate(spi);
184 r1 = mmc_spi_sendcmd(mmc, cmd->cmdidx, cmd->cmdarg);
185 if (r1 == 0xff) {
186 ret = -ENOMEDIUM;
187 goto done;
188 } else if (r1 & R1_SPI_COM_CRC) {
189 ret = -ECOMM;
190 goto done;
191 } else if (r1 & ~R1_SPI_IDLE) {
192 ret = -ETIMEDOUT;
193 goto done;
194 } else if (cmd->resp_type == MMC_RSP_R2) {
195 r1 = mmc_spi_readdata(mmc, cmd->response, 1, 16);
196 for (i = 0; i < 4; i++)
197 cmd->response[i] = be32_to_cpu(cmd->response[i]);
198 debug("r128 %x %x %x %x\n", cmd->response[0], cmd->response[1],
199 cmd->response[2], cmd->response[3]);
200 } else if (!data) {
201 switch (cmd->cmdidx) {
202 case SD_CMD_APP_SEND_OP_COND:
203 case MMC_CMD_SEND_OP_COND:
204 cmd->response[0] = (r1 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
205 break;
206 case SD_CMD_SEND_IF_COND:
207 case MMC_CMD_SPI_READ_OCR:
208 spi_xfer(spi, 4 * 8, NULL, cmd->response, 0);
209 cmd->response[0] = be32_to_cpu(cmd->response[0]);
210 debug("r32 %x\n", cmd->response[0]);
211 break;
212 case MMC_CMD_SEND_STATUS:
213 spi_xfer(spi, 1 * 8, NULL, cmd->response, 0);
214 cmd->response[0] = (cmd->response[0] & 0xff) ?
215 MMC_STATUS_ERROR : MMC_STATUS_RDY_FOR_DATA;
216 break;
217 }
218 } else {
219 debug("%s:data %x %x %x\n", __func__,
220 data->flags, data->blocks, data->blocksize);
221 if (data->flags == MMC_DATA_READ)
222 r1 = mmc_spi_readdata(mmc, data->dest,
223 data->blocks, data->blocksize);
224 else if (data->flags == MMC_DATA_WRITE)
225 r1 = mmc_spi_writedata(mmc, data->src,
226 data->blocks, data->blocksize,
227 (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK));
228 if (r1 & R1_SPI_COM_CRC)
229 ret = -ECOMM;
230 else if (r1)
231 ret = -ETIMEDOUT;
232 }
233done:
234 spi_cs_deactivate(spi);
235 spi_release_bus(spi);
236 return ret;
237}
238
239static int mmc_spi_set_ios(struct mmc *mmc)
240{
241 struct spi_slave *spi = mmc->priv;
242
243 debug("%s: clock %u\n", __func__, mmc->clock);
244 if (mmc->clock)
245 spi_set_speed(spi, mmc->clock);
246 return 0;
247}
248
249static int mmc_spi_init_p(struct mmc *mmc)
250{
251 struct spi_slave *spi = mmc->priv;
252 spi_set_speed(spi, MMC_SPI_MIN_CLOCK);
253 spi_claim_bus(spi);
254
255 spi_xfer(spi, 18 * 8, NULL, NULL, 0);
256 spi_release_bus(spi);
257 return 0;
258}
259
260static const struct mmc_ops mmc_spi_ops = {
261 .send_cmd = mmc_spi_request,
262 .set_ios = mmc_spi_set_ios,
263 .init = mmc_spi_init_p,
264};
265
266static struct mmc_config mmc_spi_cfg = {
267 .name = "MMC_SPI",
268 .ops = &mmc_spi_ops,
269 .host_caps = MMC_MODE_SPI,
270 .voltages = MMC_SPI_VOLTAGE,
271 .f_min = MMC_SPI_MIN_CLOCK,
272 .part_type = PART_TYPE_DOS,
273 .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
274};
275
276struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
277{
278 struct mmc *mmc;
279 struct spi_slave *spi;
280
281 spi = spi_setup_slave(bus, cs, speed, mode);
282 if (spi == NULL)
283 return NULL;
284
285 mmc_spi_cfg.f_max = speed;
286
287 mmc = mmc_create(&mmc_spi_cfg, spi);
288 if (mmc == NULL) {
289 spi_free_slave(spi);
290 return NULL;
291 }
292 return mmc;
293}
294
