1
2
3
4
5
6
7
8#ifndef __CONFIG_ORIGEN_H
9#define __CONFIG_ORIGEN_H
10
11#include <configs/exynos4-common.h>
12
13
14#define CONFIG_EXYNOS4210 1
15#define CONFIG_ORIGEN 1
16
17#define CONFIG_SYS_DCACHE_OFF 1
18
19
20#define CONFIG_SYS_SDRAM_BASE 0x40000000
21#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
22#define SDRAM_BANK_SIZE (256 << 20)
23
24
25#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
26#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
27#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
28
29#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
30
31
32
33
34#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
35
36#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)
37
38#define CONFIG_SYS_MONITOR_BASE 0x00000000
39
40
41#define S5P_CHECK_SLEEP 0x00000BAD
42#define S5P_CHECK_DIDLE 0xBAD00000
43#define S5P_CHECK_LPA 0xABAD0000
44
45
46#define COPY_BL2_FNPTR_ADDR 0x02020030
47#define CONFIG_SPL_TEXT_BASE 0x02021410
48
49#define CONFIG_EXTRA_ENV_SETTINGS \
50 "loadaddr=0x40007000\0" \
51 "rdaddr=0x48000000\0" \
52 "kerneladdr=0x40007000\0" \
53 "ramdiskaddr=0x48000000\0" \
54 "console=ttySAC2,115200n8\0" \
55 "mmcdev=0\0" \
56 "bootenv=uEnv.txt\0" \
57 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
58 "importbootenv=echo Importing environment from mmc ...; " \
59 "env import -t $loadaddr $filesize\0" \
60 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
61 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
62 "source ${loadaddr}\0"
63#define CONFIG_BOOTCOMMAND \
64 "if mmc rescan; then " \
65 "echo SD/MMC found on device ${mmcdev};" \
66 "if run loadbootenv; then " \
67 "echo Loaded environment from ${bootenv};" \
68 "run importbootenv;" \
69 "fi;" \
70 "if test -n $uenvcmd; then " \
71 "echo Running uenvcmd ...;" \
72 "run uenvcmd;" \
73 "fi;" \
74 "if run loadbootscript; then " \
75 "run bootscript; " \
76 "fi; " \
77 "fi;" \
78 "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
79
80#define CONFIG_CLK_1000_400_200
81
82
83#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
84
85#define CONFIG_SYS_MMC_ENV_DEV 0
86#define CONFIG_ENV_SIZE (16 << 10)
87#define RESERVE_BLOCK_SIZE (512)
88#define BL1_SIZE (16 << 10)
89#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
90
91#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
92
93#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
94
95
96#define COPY_BL2_SIZE 0x80000
97#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
98#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
99
100#endif
101