LXR uboot/include/configs/qemu-mips.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2003
   4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 */
   6
   7/*
   8 * This file contains the configuration parameters for qemu-mips target.
   9 */
  10
  11#ifndef __CONFIG_H
  12#define __CONFIG_H
  13
  14#define CONFIG_QEMU_MIPS
  15
  16#define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  17
  18#define CONFIG_EXTRA_ENV_SETTINGS                                       \
  19        "addmisc=setenv bootargs ${bootargs} "                          \
  20                "console=ttyS0,${baudrate} "                            \
  21                "panic=1\0"                                             \
  22        "bootfile=/tftpboot/vmlinux\0"                          \
  23        "load=tftp 80500000 ${u-boot}\0"                                \
  24        ""
  25
  26#define CONFIG_BOOTCOMMAND      "bootp;bootelf"
  27
  28/*
  29 * BOOTP options
  30 */
  31#define CONFIG_BOOTP_BOOTFILESIZE
  32
  33/*
  34 * Command line configuration.
  35 */
  36
  37#define CONFIG_DRIVER_NE2000
  38#define CONFIG_DRIVER_NE2000_BASE       0xb4000300
  39
  40#define CONFIG_SYS_NS16550_SERIAL
  41#define CONFIG_SYS_NS16550_REG_SIZE     1
  42#define CONFIG_SYS_NS16550_CLK          115200
  43#define CONFIG_SYS_NS16550_COM1         0xb40003f8
  44
  45#ifdef CONFIG_SYS_BIG_ENDIAN
  46#define CONFIG_IDE_SWAP_IO
  47#endif
  48
  49#define CONFIG_SYS_IDE_MAXBUS           2
  50#define CONFIG_SYS_ATA_IDE0_OFFSET      0x1f0
  51#define CONFIG_SYS_ATA_IDE1_OFFSET      0x170
  52#define CONFIG_SYS_ATA_DATA_OFFSET      0
  53#define CONFIG_SYS_ATA_REG_OFFSET       0
  54#define CONFIG_SYS_ATA_BASE_ADDR        0xb4000000
  55
  56#define CONFIG_SYS_IDE_MAXDEVICE        4
  57
  58/*
  59 * Miscellaneous configurable options
  60 */
  61
  62#define CONFIG_SYS_MALLOC_LEN           (256 << 10)
  63
  64#define CONFIG_SYS_BOOTPARAMS_LEN       128*1024
  65
  66#define CONFIG_SYS_MHZ                  132
  67
  68#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
  69
  70/* Cached addr */
  71#define CONFIG_SYS_SDRAM_BASE           0x80000000
  72
  73/* default load address */
  74#define CONFIG_SYS_LOAD_ADDR            0x81000000
  75
  76#define CONFIG_SYS_MEMTEST_START        0x80100000
  77#define CONFIG_SYS_MEMTEST_END          0x80800000
  78
  79/*-----------------------------------------------------------------------
  80 * FLASH and environment organization
  81 */
  82/* The following #defines are needed to get flash environment right */
  83#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  84
  85#define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  86
  87/* We boot from this flash, selected with dip switch */
  88#define CONFIG_SYS_FLASH_BASE           0xbfc00000
  89#define CONFIG_SYS_MAX_FLASH_BANKS      1
  90#define CONFIG_SYS_MAX_FLASH_SECT       128
  91
  92/* Address and size of Primary Environment Sector */
  93#define CONFIG_ENV_SIZE         0x8000
  94#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
  95
  96#define CONFIG_ENV_OVERWRITE    1
  97
  98#define MEM_SIZE                128
  99
 100#endif /* __CONFIG_H */
 101