LXR uboot/include/configs/snapper9260.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Bluewater Systems Snapper 9260 and 9G20 modules
   4 *
   5 * (C) Copyright 2011 Bluewater Systems
   6 *   Author: Andre Renaud <andre@bluewatersys.com>
   7 *   Author: Ryan Mallon <ryan@bluewatersys.com>
   8 */
   9
  10#ifndef __CONFIG_H
  11#define __CONFIG_H
  12
  13/* SoC type is defined in boards.cfg */
  14#include <asm/hardware.h>
  15#include <linux/sizes.h>
  16
  17/* ARM asynchronous clock */
  18#define CONFIG_SYS_AT91_MAIN_CLOCK      18432000 /* External Crystal, in Hz */
  19#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  20
  21/* CPU */
  22#define CONFIG_ARCH_CPU_INIT
  23
  24#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  25#define CONFIG_SETUP_MEMORY_TAGS
  26#define CONFIG_INITRD_TAG
  27#define CONFIG_SKIP_LOWLEVEL_INIT
  28
  29/* SDRAM */
  30#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  31#define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024) /* 64MB */
  32#define CONFIG_SYS_INIT_SP_ADDR         (ATMEL_BASE_SRAM1 + 0x1000 - \
  33                                         GENERATED_GBL_DATA_SIZE)
  34
  35/* Mem test settings */
  36#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  37#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
  38
  39/* NAND Flash */
  40#define CONFIG_SYS_MAX_NAND_DEVICE      1
  41#define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  42#define CONFIG_SYS_NAND_DBW_8
  43#define CONFIG_SYS_NAND_MASK_ALE        (1 << 21) /* AD21 */
  44#define CONFIG_SYS_NAND_MASK_CLE        (1 << 22) /* AD22 */
  45#define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  46#define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  47
  48/* Ethernet */
  49#define CONFIG_MACB
  50#define CONFIG_RMII
  51#define CONFIG_NET_RETRY_COUNT          20
  52#define CONFIG_RESET_PHY_R
  53#define CONFIG_AT91_WANTS_COMMON_PHY
  54#define CONFIG_TFTP_PORT
  55#define CONFIG_TFTP_TSIZE
  56
  57/* USB */
  58#define CONFIG_USB_ATMEL
  59#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  60#define CONFIG_USB_OHCI_NEW
  61#define CONFIG_SYS_USB_OHCI_CPU_INIT
  62#define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_UHP_BASE
  63#define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9260"
  64#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  65
  66/* GPIOs and IO expander */
  67#define CONFIG_ATMEL_LEGACY
  68#define CONFIG_AT91_GPIO
  69#define CONFIG_AT91_GPIO_PULLUP         1
  70#define CONFIG_PCA953X
  71#define CONFIG_SYS_I2C_PCA953X_ADDR     0x28
  72#define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x28, 16} }
  73
  74/* UARTs/Serial console */
  75#define CONFIG_ATMEL_USART
  76#ifndef CONFIG_DM_SERIAL
  77#define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  78#define CONFIG_USART_ID                 ATMEL_ID_SYS
  79#endif
  80
  81/* I2C - Bit-bashed */
  82#define CONFIG_SYS_I2C
  83#define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
  84#define CONFIG_SYS_I2C_SOFT_SPEED       100000
  85#define CONFIG_SYS_I2C_SOFT_SLAVE       0x7F
  86#define CONFIG_SOFT_I2C_READ_REPEATED_START
  87#define I2C_INIT do {                                                   \
  88                at91_set_gpio_output(AT91_PIN_PA23, 1);                 \
  89                at91_set_gpio_output(AT91_PIN_PA24, 1);                 \
  90                at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);        \
  91                at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);        \
  92        } while (0)
  93#define I2C_SOFT_DECLARATIONS
  94#define I2C_ACTIVE
  95#define I2C_TRISTATE    at91_set_gpio_input(AT91_PIN_PA23, 1);
  96#define I2C_READ        at91_get_gpio_value(AT91_PIN_PA23);
  97#define I2C_SDA(bit) do {                                               \
  98                if (bit) {                                              \
  99                        at91_set_gpio_input(AT91_PIN_PA23, 1);          \
 100                } else {                                                \
 101                        at91_set_gpio_output(AT91_PIN_PA23, 1);         \
 102                        at91_set_gpio_value(AT91_PIN_PA23, bit);        \
 103                }                                                       \
 104        } while (0)
 105#define I2C_SCL(bit)    at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
 106#define I2C_DELAY       udelay(2)
 107
 108/* Boot options */
 109#define CONFIG_SYS_LOAD_ADDR            0x23000000
 110
 111#define CONFIG_BOOTP_BOOTFILESIZE
 112
 113/* Environment settings */
 114#define CONFIG_ENV_OFFSET               (512 << 10)
 115#define CONFIG_ENV_SIZE                 (256 << 10)
 116#define CONFIG_ENV_OVERWRITE
 117
 118/* Console settings */
 119
 120/* U-Boot memory settings */
 121#define CONFIG_SYS_MALLOC_LEN           (1 << 20)
 122
 123#endif /* __CONFIG_H */
 124