LXR uboot/arch/arm/cpu/armv7/ls102xa/timer.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2014 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <common.h>
   7#include <asm/io.h>
   8#include <div64.h>
   9#include <asm/arch/immap_ls102xa.h>
  10#include <asm/arch/clock.h>
  11
  12DECLARE_GLOBAL_DATA_PTR;
  13
  14/*
  15 * This function is intended for SHORT delays only.
  16 * It will overflow at around 10 seconds @ 400MHz,
  17 * or 20 seconds @ 200MHz.
  18 */
  19unsigned long usec2ticks(unsigned long usec)
  20{
  21        ulong ticks;
  22
  23        if (usec < 1000)
  24                ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  25        else
  26                ticks = ((usec / 10) * (get_tbclk() / 100000));
  27
  28        return ticks;
  29}
  30
  31static inline unsigned long long tick_to_time(unsigned long long tick)
  32{
  33        unsigned long freq;
  34
  35        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  36
  37        tick *= CONFIG_SYS_HZ;
  38        do_div(tick, freq);
  39
  40        return tick;
  41}
  42
  43static inline unsigned long long us_to_tick(unsigned long long usec)
  44{
  45        unsigned long freq;
  46
  47        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  48
  49        usec = usec * freq  + 999999;
  50        do_div(usec, 1000000);
  51
  52        return usec;
  53}
  54
  55int timer_init(void)
  56{
  57        struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
  58        unsigned long ctrl, freq;
  59        unsigned long long val;
  60
  61        /* Enable System Counter */
  62        writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
  63
  64        freq = COUNTER_FREQUENCY;
  65        asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
  66
  67        /* Set PL1 Physical Timer Ctrl */
  68        ctrl = ARCH_TIMER_CTRL_ENABLE;
  69        asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
  70
  71        /* Set PL1 Physical Comp Value */
  72        val = TIMER_COMP_VAL;
  73        asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
  74
  75        gd->arch.tbl = 0;
  76        gd->arch.tbu = 0;
  77
  78        return 0;
  79}
  80
  81unsigned long long get_ticks(void)
  82{
  83        unsigned long long now;
  84
  85        asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
  86
  87        gd->arch.tbl = (unsigned long)(now & 0xffffffff);
  88        gd->arch.tbu = (unsigned long)(now >> 32);
  89
  90        return now;
  91}
  92
  93unsigned long get_timer(ulong base)
  94{
  95        return tick_to_time(get_ticks()) - base;
  96}
  97
  98/* delay x useconds and preserve advance timstamp value */
  99void __udelay(unsigned long usec)
 100{
 101        unsigned long long start;
 102        unsigned long tmo;
 103
 104        start = get_ticks();                    /* get current timestamp */
 105        tmo = us_to_tick(usec);                 /* convert usecs to ticks */
 106
 107        while ((get_ticks() - start) < tmo)
 108                ;                               /* loop till time has passed */
 109}
 110
 111/*
 112 * This function is derived from PowerPC code (timebase clock frequency).
 113 * On ARM it returns the number of timer ticks per second.
 114 */
 115unsigned long get_tbclk(void)
 116{
 117        unsigned long freq;
 118
 119        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
 120
 121        return freq;
 122}
 123