LXR uboot/arch/arm/mach-k3/am6

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * K3: Architecture initialization
   4 *
   5 * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
   6 *      Lokesh Vutla <lokeshvutla@ti.com>
   7 */
   8
   9#include <common.h>
  10#include <asm/io.h>
  11#include <spl.h>
  12#include <asm/arch/hardware.h>
  13#include "common.h"
  14#include <dm.h>
  15
  16#ifdef CONFIG_SPL_BUILD
  17static void mmr_unlock(u32 base, u32 partition)
  18{
  19        /* Translate the base address */
  20        phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
  21
  22        /* Unlock the requested partition if locked using two-step sequence */
  23        writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
  24        writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
  25}
  26
  27static void ctrl_mmr_unlock(void)
  28{
  29        /* Unlock all WKUP_CTRL_MMR0 module registers */
  30        mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
  31        mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
  32        mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
  33        mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
  34        mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
  35        mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
  36
  37        /* Unlock all MCU_CTRL_MMR0 module registers */
  38        mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
  39        mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
  40        mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
  41        mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
  42
  43        /* Unlock all CTRL_MMR0 module registers */
  44        mmr_unlock(CTRL_MMR0_BASE, 0);
  45        mmr_unlock(CTRL_MMR0_BASE, 1);
  46        mmr_unlock(CTRL_MMR0_BASE, 2);
  47        mmr_unlock(CTRL_MMR0_BASE, 3);
  48        mmr_unlock(CTRL_MMR0_BASE, 6);
  49        mmr_unlock(CTRL_MMR0_BASE, 7);
  50}
  51
  52static void store_boot_index_from_rom(void)
  53{
  54        u32 *boot_index = (u32 *)K3_BOOT_PARAM_TABLE_INDEX_VAL;
  55
  56        *boot_index = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
  57}
  58
  59void board_init_f(ulong dummy)
  60{
  61#if defined(CONFIG_K3_AM654_DDRSS)
  62        struct udevice *dev;
  63        int ret;
  64#endif
  65        /*
  66         * Cannot delay this further as there is a chance that
  67         * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
  68         */
  69        store_boot_index_from_rom();
  70
  71        /* Make all control module registers accessible */
  72        ctrl_mmr_unlock();
  73
  74#ifdef CONFIG_CPU_V7R
  75        setup_k3_mpu_regions();
  76#endif
  77
  78        /* Init DM early in-order to invoke system controller */
  79        spl_early_init();
  80
  81        /* Prepare console output */
  82        preloader_console_init();
  83
  84#ifdef CONFIG_K3_AM654_DDRSS
  85        ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  86        if (ret) {
  87                printf("DRAM init failed: %d\n", ret);
  88                return;
  89        }
  90#endif
  91}
  92
  93u32 spl_boot_mode(const u32 boot_device)
  94{
  95#if defined(CONFIG_SUPPORT_EMMC_BOOT)
  96        u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
  97        u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
  98
  99        u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
 100                        CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
 101
 102        /* eMMC boot0 mode is only supported for primary boot */
 103        if (bootindex == K3_PRIMARY_BOOTMODE &&
 104            bootmode == BOOT_DEVICE_MMC1)
 105                return MMCSD_MODE_EMMCBOOT;
 106#endif
 107
 108        /* Everything else use filesystem if available */
 109#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
 110        return MMCSD_MODE_FS;
 111#else
 112        return MMCSD_MODE_RAW;
 113#endif
 114}
 115
 116static u32 __get_backup_bootmedia(u32 devstat)
 117{
 118        u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
 119                        CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
 120
 121        switch (bkup_boot) {
 122        case BACKUP_BOOT_DEVICE_USB:
 123                return BOOT_DEVICE_USB;
 124        case BACKUP_BOOT_DEVICE_UART:
 125                return BOOT_DEVICE_UART;
 126        case BACKUP_BOOT_DEVICE_ETHERNET:
 127                return BOOT_DEVICE_ETHERNET;
 128        case BACKUP_BOOT_DEVICE_MMC2:
 129        {
 130                u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >>
 131                            CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
 132                if (port == 0x0)
 133                        return BOOT_DEVICE_MMC1;
 134                return BOOT_DEVICE_MMC2;
 135        }
 136        case BACKUP_BOOT_DEVICE_SPI:
 137                return BOOT_DEVICE_SPI;
 138        case BACKUP_BOOT_DEVICE_HYPERFLASH:
 139                return BOOT_DEVICE_HYPERFLASH;
 140        case BACKUP_BOOT_DEVICE_I2C:
 141                return BOOT_DEVICE_I2C;
 142        };
 143
 144        return BOOT_DEVICE_RAM;
 145}
 146
 147static u32 __get_primary_bootmedia(u32 devstat)
 148{
 149        u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
 150                        CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
 151
 152        if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)
 153                bootmode = BOOT_DEVICE_SPI;
 154
 155        if (bootmode == BOOT_DEVICE_MMC2) {
 156                u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >>
 157                            CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT;
 158                if (port == 0x0)
 159                        bootmode = BOOT_DEVICE_MMC1;
 160        } else if (bootmode == BOOT_DEVICE_MMC1) {
 161                u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >>
 162                            CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT;
 163                if (port == 0x1)
 164                        bootmode = BOOT_DEVICE_MMC2;
 165        }
 166
 167        return bootmode;
 168}
 169
 170u32 spl_boot_device(void)
 171{
 172        u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
 173        u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
 174
 175        if (bootindex == K3_PRIMARY_BOOTMODE)
 176                return __get_primary_bootmedia(devstat);
 177        else
 178                return __get_backup_bootmedia(devstat);
 179}
 180#endif
 181
 182#ifndef CONFIG_SYSRESET
 183void reset_cpu(ulong ignored)
 184{
 185}
 186#endif
 187