LXR uboot/arch/powerpc/cpu/mpc83xx/fdt.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2007 Freescale Semiconductor, Inc.
   4 *
   5 * (C) Copyright 2000
   6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7 */
   8
   9#include <common.h>
  10#include <linux/libfdt.h>
  11#include <fdt_support.h>
  12#include <asm/processor.h>
  13
  14extern void ft_qe_setup(void *blob);
  15
  16DECLARE_GLOBAL_DATA_PTR;
  17
  18#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
  19        (defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
  20#include <linux/immap_qe.h>
  21
  22void fdt_fixup_muram (void *blob)
  23{
  24        ulong data[2];
  25
  26        data[0] = 0;
  27        data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
  28        do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
  29                        data, sizeof (data), 0);
  30}
  31#endif
  32
  33void ft_cpu_setup(void *blob, bd_t *bd)
  34{
  35        immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  36        int spridr = immr->sysconf.spridr;
  37
  38        /*
  39         * delete crypto node if not on an E-processor
  40         * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
  41         * EA revisions got the SEC uprevved to 2.4 but since the default device
  42         * tree contains SEC 2.0 properties we uprev them here.
  43         */
  44        if (!IS_E_PROCESSOR(spridr))
  45                fdt_fixup_crypto_node(blob, 0);
  46        else if (IS_E_PROCESSOR(spridr) &&
  47                 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
  48                  SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
  49                 REVID_MAJOR(spridr) >= 2)
  50                fdt_fixup_crypto_node(blob, 0x0204);
  51
  52#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
  53    defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
  54    defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
  55#ifdef CONFIG_MPC8313
  56        /*
  57        * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
  58        * h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
  59        * so if on Rev. 2 (and higher) h/w, we fix them up here
  60        */
  61        if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
  62                int nodeoffset, path;
  63                const char *prop;
  64
  65                nodeoffset = fdt_path_offset(blob, "/aliases");
  66                if (nodeoffset >= 0) {
  67#if defined(CONFIG_HAS_ETH0)
  68                        prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
  69                        if (prop) {
  70                                u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
  71
  72                                path = fdt_path_offset(blob, prop);
  73                                prop = fdt_getprop(blob, path, "interrupts",
  74                                                   NULL);
  75                                if (prop)
  76                                        fdt_setprop(blob, path, "interrupts",
  77                                                    &tmp, sizeof(tmp));
  78                        }
  79#endif
  80#if defined(CONFIG_HAS_ETH1)
  81                        prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
  82                        if (prop) {
  83                                u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
  84
  85                                path = fdt_path_offset(blob, prop);
  86                                prop = fdt_getprop(blob, path, "interrupts",
  87                                                   NULL);
  88                                if (prop)
  89                                        fdt_setprop(blob, path, "interrupts",
  90                                                    &tmp, sizeof(tmp));
  91                        }
  92#endif
  93                }
  94        }
  95#endif
  96#endif
  97
  98        do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  99                "timebase-frequency", (bd->bi_busfreq / 4), 1);
 100        do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 101                "bus-frequency", bd->bi_busfreq, 1);
 102        do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 103                "clock-frequency", gd->arch.core_clk, 1);
 104        do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
 105                "bus-frequency", bd->bi_busfreq, 1);
 106        do_fixup_by_compat_u32(blob, "fsl,soc",
 107                "bus-frequency", bd->bi_busfreq, 1);
 108        do_fixup_by_compat_u32(blob, "fsl,soc",
 109                "clock-frequency", bd->bi_busfreq, 1);
 110        do_fixup_by_compat_u32(blob, "fsl,immr",
 111                "bus-frequency", bd->bi_busfreq, 1);
 112        do_fixup_by_compat_u32(blob, "fsl,immr",
 113                "clock-frequency", bd->bi_busfreq, 1);
 114#ifdef CONFIG_QE
 115        ft_qe_setup(blob);
 116#endif
 117
 118#ifdef CONFIG_SYS_NS16550
 119        do_fixup_by_compat_u32(blob, "ns16550",
 120                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 121#endif
 122
 123        fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 124
 125#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
 126        (defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
 127        fdt_fixup_muram (blob);
 128#endif
 129}
 130