1menu "mpc85xx CPU" 2 depends on MPC85xx 3 4config SYS_CPU 5 default "mpc85xx" 6 7config CMD_ERRATA 8 bool "Enable the 'errata' command" 9 depends on MPC85xx 10 default y 11 help 12 This enables the 'errata' command which displays a list of errata 13 work-arounds which are enabled for the current board. 14 15choice 16 prompt "Target select" 17 optional 18 19config TARGET_SBC8548 20 bool "Support sbc8548" 21 select ARCH_MPC8548 22 23config TARGET_SOCRATES 24 bool "Support socrates" 25 select ARCH_MPC8544 26 27config TARGET_B4420QDS 28 bool "Support B4420QDS" 29 select ARCH_B4420 30 select SUPPORT_SPL 31 select PHYS_64BIT 32 imply PANIC_HANG 33 34config TARGET_B4860QDS 35 bool "Support B4860QDS" 36 select ARCH_B4860 37 select BOARD_LATE_INIT if CHAIN_OF_TRUST 38 select SUPPORT_SPL 39 select PHYS_64BIT 40 imply PANIC_HANG 41 42config TARGET_BSC9131RDB 43 bool "Support BSC9131RDB" 44 select ARCH_BSC9131 45 select SUPPORT_SPL 46 select BOARD_EARLY_INIT_F 47 48config TARGET_BSC9132QDS 49 bool "Support BSC9132QDS" 50 select ARCH_BSC9132 51 select BOARD_LATE_INIT if CHAIN_OF_TRUST 52 select SUPPORT_SPL 53 select BOARD_EARLY_INIT_F 54 55config TARGET_C29XPCIE 56 bool "Support C29XPCIE" 57 select ARCH_C29X 58 select BOARD_LATE_INIT if CHAIN_OF_TRUST 59 select SUPPORT_SPL 60 select SUPPORT_TPL 61 select PHYS_64BIT 62 imply PANIC_HANG 63 64config TARGET_P3041DS 65 bool "Support P3041DS" 66 select PHYS_64BIT 67 select ARCH_P3041 68 select BOARD_LATE_INIT if CHAIN_OF_TRUST 69 imply CMD_SATA 70 imply PANIC_HANG 71 72config TARGET_P4080DS 73 bool "Support P4080DS" 74 select PHYS_64BIT 75 select ARCH_P4080 76 select BOARD_LATE_INIT if CHAIN_OF_TRUST 77 imply CMD_SATA 78 imply PANIC_HANG 79 80config TARGET_P5020DS 81 bool "Support P5020DS" 82 select PHYS_64BIT 83 select ARCH_P5020 84 select BOARD_LATE_INIT if CHAIN_OF_TRUST 85 imply CMD_SATA 86 imply PANIC_HANG 87 88config TARGET_P5040DS 89 bool "Support P5040DS" 90 select PHYS_64BIT 91 select ARCH_P5040 92 select BOARD_LATE_INIT if CHAIN_OF_TRUST 93 imply CMD_SATA 94 imply PANIC_HANG 95 96config TARGET_MPC8536DS 97 bool "Support MPC8536DS" 98 select ARCH_MPC8536 99# Use DDR3 controller with DDR2 DIMMs on this board 100 select SYS_FSL_DDRC_GEN3 101 imply CMD_SATA 102 imply FSL_SATA 103 104config TARGET_MPC8541CDS 105 bool "Support MPC8541CDS" 106 select ARCH_MPC8541 107 108config TARGET_MPC8544DS 109 bool "Support MPC8544DS" 110 select ARCH_MPC8544 111 imply PANIC_HANG 112 113config TARGET_MPC8548CDS 114 bool "Support MPC8548CDS" 115 select ARCH_MPC8548 116 117config TARGET_MPC8555CDS 118 bool "Support MPC8555CDS" 119 select ARCH_MPC8555 120 121config TARGET_MPC8568MDS 122 bool "Support MPC8568MDS" 123 select ARCH_MPC8568 124 125config TARGET_MPC8569MDS 126 bool "Support MPC8569MDS" 127 select ARCH_MPC8569 128 129config TARGET_MPC8572DS 130 bool "Support MPC8572DS" 131 select ARCH_MPC8572 132# Use DDR3 controller with DDR2 DIMMs on this board 133 select SYS_FSL_DDRC_GEN3 134 imply SCSI 135 imply PANIC_HANG 136 137config TARGET_P1010RDB_PA 138 bool "Support P1010RDB_PA" 139 select ARCH_P1010 140 select BOARD_LATE_INIT if CHAIN_OF_TRUST 141 select SUPPORT_SPL 142 select SUPPORT_TPL 143 imply CMD_EEPROM 144 imply CMD_SATA 145 imply PANIC_HANG 146 147config TARGET_P1010RDB_PB 148 bool "Support P1010RDB_PB" 149 select ARCH_P1010 150 select BOARD_LATE_INIT if CHAIN_OF_TRUST 151 select SUPPORT_SPL 152 select SUPPORT_TPL 153 imply CMD_EEPROM 154 imply CMD_SATA 155 imply PANIC_HANG 156 157config TARGET_P1022DS 158 bool "Support P1022DS" 159 select ARCH_P1022 160 select SUPPORT_SPL 161 select SUPPORT_TPL 162 imply CMD_SATA 163 imply FSL_SATA 164 165config TARGET_P1023RDB 166 bool "Support P1023RDB" 167 select ARCH_P1023 168 imply CMD_EEPROM 169 imply PANIC_HANG 170 171config TARGET_P1020MBG 172 bool "Support P1020MBG-PC" 173 select SUPPORT_SPL 174 select SUPPORT_TPL 175 select ARCH_P1020 176 imply CMD_EEPROM 177 imply CMD_SATA 178 imply PANIC_HANG 179 180config TARGET_P1020RDB_PC 181 bool "Support P1020RDB-PC" 182 select SUPPORT_SPL 183 select SUPPORT_TPL 184 select ARCH_P1020 185 imply CMD_EEPROM 186 imply CMD_SATA 187 imply PANIC_HANG 188 189config TARGET_P1020RDB_PD 190 bool "Support P1020RDB-PD" 191 select SUPPORT_SPL 192 select SUPPORT_TPL 193 select ARCH_P1020 194 imply CMD_EEPROM 195 imply CMD_SATA 196 imply PANIC_HANG 197 198config TARGET_P1020UTM 199 bool "Support P1020UTM" 200 select SUPPORT_SPL 201 select SUPPORT_TPL 202 select ARCH_P1020 203 imply CMD_EEPROM 204 imply CMD_SATA 205 imply PANIC_HANG 206 207config TARGET_P1021RDB 208 bool "Support P1021RDB" 209 select SUPPORT_SPL 210 select SUPPORT_TPL 211 select ARCH_P1021 212 imply CMD_EEPROM 213 imply CMD_SATA 214 imply PANIC_HANG 215 216config TARGET_P1024RDB 217 bool "Support P1024RDB" 218 select SUPPORT_SPL 219 select SUPPORT_TPL 220 select ARCH_P1024 221 imply CMD_EEPROM 222 imply CMD_SATA 223 imply PANIC_HANG 224 225config TARGET_P1025RDB 226 bool "Support P1025RDB" 227 select SUPPORT_SPL 228 select SUPPORT_TPL 229 select ARCH_P1025 230 imply CMD_EEPROM 231 imply CMD_SATA 232 imply SATA_SIL 233 234config TARGET_P2020RDB 235 bool "Support P2020RDB-PC" 236 select SUPPORT_SPL 237 select SUPPORT_TPL 238 select ARCH_P2020 239 imply CMD_EEPROM 240 imply CMD_SATA 241 imply SATA_SIL 242 243config TARGET_P1_TWR 244 bool "Support p1_twr" 245 select ARCH_P1025 246 247config TARGET_P2041RDB 248 bool "Support P2041RDB" 249 select ARCH_P2041 250 select BOARD_LATE_INIT if CHAIN_OF_TRUST 251 select PHYS_64BIT 252 imply CMD_SATA 253 imply FSL_SATA 254 255config TARGET_QEMU_PPCE500 256 bool "Support qemu-ppce500" 257 select ARCH_QEMU_E500 258 select PHYS_64BIT 259 260config TARGET_T1024QDS 261 bool "Support T1024QDS" 262 select ARCH_T1024 263 select BOARD_LATE_INIT if CHAIN_OF_TRUST 264 select SUPPORT_SPL 265 select PHYS_64BIT 266 imply CMD_EEPROM 267 imply CMD_SATA 268 imply FSL_SATA 269 270config TARGET_T1023RDB 271 bool "Support T1023RDB" 272 select ARCH_T1023 273 select BOARD_LATE_INIT if CHAIN_OF_TRUST 274 select SUPPORT_SPL 275 select PHYS_64BIT 276 imply CMD_EEPROM 277 imply PANIC_HANG 278 279config TARGET_T1024RDB 280 bool "Support T1024RDB" 281 select ARCH_T1024 282 select BOARD_LATE_INIT if CHAIN_OF_TRUST 283 select SUPPORT_SPL 284 select PHYS_64BIT 285 imply CMD_EEPROM 286 imply PANIC_HANG 287 288config TARGET_T1040QDS 289 bool "Support T1040QDS" 290 select ARCH_T1040 291 select BOARD_LATE_INIT if CHAIN_OF_TRUST 292 select PHYS_64BIT 293 imply CMD_EEPROM 294 imply CMD_SATA 295 imply PANIC_HANG 296 297config TARGET_T1040RDB 298 bool "Support T1040RDB" 299 select ARCH_T1040 300 select BOARD_LATE_INIT if CHAIN_OF_TRUST 301 select SUPPORT_SPL 302 select PHYS_64BIT 303 imply CMD_SATA 304 imply PANIC_HANG 305 306config TARGET_T1040D4RDB 307 bool "Support T1040D4RDB" 308 select ARCH_T1040 309 select BOARD_LATE_INIT if CHAIN_OF_TRUST 310 select SUPPORT_SPL 311 select PHYS_64BIT 312 imply CMD_SATA 313 imply PANIC_HANG 314 315config TARGET_T1042RDB 316 bool "Support T1042RDB" 317 select ARCH_T1042 318 select BOARD_LATE_INIT if CHAIN_OF_TRUST 319 select SUPPORT_SPL 320 select PHYS_64BIT 321 imply CMD_SATA 322 323config TARGET_T1042D4RDB 324 bool "Support T1042D4RDB" 325 select ARCH_T1042 326 select BOARD_LATE_INIT if CHAIN_OF_TRUST 327 select SUPPORT_SPL 328 select PHYS_64BIT 329 imply CMD_SATA 330 imply PANIC_HANG 331 332config TARGET_T1042RDB_PI 333 bool "Support T1042RDB_PI" 334 select ARCH_T1042 335 select BOARD_LATE_INIT if CHAIN_OF_TRUST 336 select SUPPORT_SPL 337 select PHYS_64BIT 338 imply CMD_SATA 339 imply PANIC_HANG 340 341config TARGET_T2080QDS 342 bool "Support T2080QDS" 343 select ARCH_T2080 344 select BOARD_LATE_INIT if CHAIN_OF_TRUST 345 select SUPPORT_SPL 346 select PHYS_64BIT 347 imply CMD_SATA 348 349config TARGET_T2080RDB 350 bool "Support T2080RDB" 351 select ARCH_T2080 352 select BOARD_LATE_INIT if CHAIN_OF_TRUST 353 select SUPPORT_SPL 354 select PHYS_64BIT 355 imply CMD_SATA 356 imply PANIC_HANG 357 358config TARGET_T2081QDS 359 bool "Support T2081QDS" 360 select ARCH_T2081 361 select SUPPORT_SPL 362 select PHYS_64BIT 363 364config TARGET_T4160QDS 365 bool "Support T4160QDS" 366 select ARCH_T4160 367 select BOARD_LATE_INIT if CHAIN_OF_TRUST 368 select SUPPORT_SPL 369 select PHYS_64BIT 370 imply CMD_SATA 371 imply PANIC_HANG 372 373config TARGET_T4160RDB 374 bool "Support T4160RDB" 375 select ARCH_T4160 376 select SUPPORT_SPL 377 select PHYS_64BIT 378 imply PANIC_HANG 379 380config TARGET_T4240QDS 381 bool "Support T4240QDS" 382 select ARCH_T4240 383 select BOARD_LATE_INIT if CHAIN_OF_TRUST 384 select SUPPORT_SPL 385 select PHYS_64BIT 386 imply CMD_SATA 387 imply PANIC_HANG 388 389config TARGET_T4240RDB 390 bool "Support T4240RDB" 391 select ARCH_T4240 392 select SUPPORT_SPL 393 select PHYS_64BIT 394 imply CMD_SATA 395 imply PANIC_HANG 396 397config TARGET_CONTROLCENTERD 398 bool "Support controlcenterd" 399 select ARCH_P1022 400 401config TARGET_KMP204X 402 bool "Support kmp204x" 403 select ARCH_P2041 404 select PHYS_64BIT 405 imply CMD_CRAMFS 406 imply FS_CRAMFS 407 408config TARGET_XPEDITE520X 409 bool "Support xpedite520x" 410 select ARCH_MPC8548 411 412config TARGET_XPEDITE537X 413 bool "Support xpedite537x" 414 select ARCH_MPC8572 415# Use DDR3 controller with DDR2 DIMMs on this board 416 select SYS_FSL_DDRC_GEN3 417 418config TARGET_XPEDITE550X 419 bool "Support xpedite550x" 420 select ARCH_P2020 421 422config TARGET_UCP1020 423 bool "Support uCP1020" 424 select ARCH_P1020 425 imply CMD_SATA 426 imply PANIC_HANG 427 428config TARGET_CYRUS_P5020 429 bool "Support Varisys Cyrus P5020" 430 select ARCH_P5020 431 select PHYS_64BIT 432 imply PANIC_HANG 433 434config TARGET_CYRUS_P5040 435 bool "Support Varisys Cyrus P5040" 436 select ARCH_P5040 437 select PHYS_64BIT 438 imply PANIC_HANG 439 440endchoice 441 442config ARCH_B4420 443 bool 444 select E500MC 445 select E6500 446 select FSL_LAW 447 select SYS_FSL_DDR_VER_47 448 select SYS_FSL_ERRATUM_A004477 449 select SYS_FSL_ERRATUM_A005871 450 select SYS_FSL_ERRATUM_A006379 451 select SYS_FSL_ERRATUM_A006384 452 select SYS_FSL_ERRATUM_A006475 453 select SYS_FSL_ERRATUM_A006593 454 select SYS_FSL_ERRATUM_A007075 455 select SYS_FSL_ERRATUM_A007186 456 select SYS_FSL_ERRATUM_A007212 457 select SYS_FSL_ERRATUM_A009942 458 select SYS_FSL_HAS_DDR3 459 select SYS_FSL_HAS_SEC 460 select SYS_FSL_QORIQ_CHASSIS2 461 select SYS_FSL_SEC_BE 462 select SYS_FSL_SEC_COMPAT_4 463 select SYS_PPC64 464 select FSL_IFC 465 imply CMD_EEPROM 466 imply CMD_NAND 467 imply CMD_REGINFO 468 469config ARCH_B4860 470 bool 471 select E500MC 472 select E6500 473 select FSL_LAW 474 select SYS_FSL_DDR_VER_47 475 select SYS_FSL_ERRATUM_A004477 476 select SYS_FSL_ERRATUM_A005871 477 select SYS_FSL_ERRATUM_A006379 478 select SYS_FSL_ERRATUM_A006384 479 select SYS_FSL_ERRATUM_A006475 480 select SYS_FSL_ERRATUM_A006593 481 select SYS_FSL_ERRATUM_A007075 482 select SYS_FSL_ERRATUM_A007186 483 select SYS_FSL_ERRATUM_A007212 484 select SYS_FSL_ERRATUM_A007907 485 select SYS_FSL_ERRATUM_A009942 486 select SYS_FSL_HAS_DDR3 487 select SYS_FSL_HAS_SEC 488 select SYS_FSL_QORIQ_CHASSIS2 489 select SYS_FSL_SEC_BE 490 select SYS_FSL_SEC_COMPAT_4 491 select SYS_PPC64 492 select FSL_IFC 493 imply CMD_EEPROM 494 imply CMD_NAND 495 imply CMD_REGINFO 496 497config ARCH_BSC9131 498 bool 499 select FSL_LAW 500 select SYS_FSL_DDR_VER_44 501 select SYS_FSL_ERRATUM_A004477 502 select SYS_FSL_ERRATUM_A005125 503 select SYS_FSL_ERRATUM_ESDHC111 504 select SYS_FSL_HAS_DDR3 505 select SYS_FSL_HAS_SEC 506 select SYS_FSL_SEC_BE 507 select SYS_FSL_SEC_COMPAT_4 508 select FSL_IFC 509 imply CMD_EEPROM 510 imply CMD_NAND 511 imply CMD_REGINFO 512 513config ARCH_BSC9132 514 bool 515 select FSL_LAW 516 select SYS_FSL_DDR_VER_46 517 select SYS_FSL_ERRATUM_A004477 518 select SYS_FSL_ERRATUM_A005125 519 select SYS_FSL_ERRATUM_A005434 520 select SYS_FSL_ERRATUM_ESDHC111 521 select SYS_FSL_ERRATUM_I2C_A004447 522 select SYS_FSL_ERRATUM_IFC_A002769 523 select SYS_FSL_HAS_DDR3 524 select SYS_FSL_HAS_SEC 525 select SYS_FSL_SEC_BE 526 select SYS_FSL_SEC_COMPAT_4 527 select SYS_PPC_E500_USE_DEBUG_TLB 528 select FSL_IFC 529 imply CMD_EEPROM 530 imply CMD_MTDPARTS 531 imply CMD_NAND 532 imply CMD_PCI 533 imply CMD_REGINFO 534 535config ARCH_C29X 536 bool 537 select FSL_LAW 538 select SYS_FSL_DDR_VER_46 539 select SYS_FSL_ERRATUM_A005125 540 select SYS_FSL_ERRATUM_ESDHC111 541 select SYS_FSL_HAS_DDR3 542 select SYS_FSL_HAS_SEC 543 select SYS_FSL_SEC_BE 544 select SYS_FSL_SEC_COMPAT_6 545 select SYS_PPC_E500_USE_DEBUG_TLB 546 select FSL_IFC 547 imply CMD_NAND 548 imply CMD_PCI 549 imply CMD_REGINFO 550 551config ARCH_MPC8536 552 bool 553 select FSL_LAW 554 select SYS_FSL_ERRATUM_A004508 555 select SYS_FSL_ERRATUM_A005125 556 select SYS_FSL_HAS_DDR2 557 select SYS_FSL_HAS_DDR3 558 select SYS_FSL_HAS_SEC 559 select SYS_FSL_SEC_BE 560 select SYS_FSL_SEC_COMPAT_2 561 select SYS_PPC_E500_USE_DEBUG_TLB 562 select FSL_ELBC 563 imply CMD_NAND 564 imply CMD_SATA 565 imply CMD_REGINFO 566 567config ARCH_MPC8540 568 bool 569 select FSL_LAW 570 select SYS_FSL_HAS_DDR1 571 572config ARCH_MPC8541 573 bool 574 select FSL_LAW 575 select SYS_FSL_HAS_DDR1 576 select SYS_FSL_HAS_SEC 577 select SYS_FSL_SEC_BE 578 select SYS_FSL_SEC_COMPAT_2 579 580config ARCH_MPC8544 581 bool 582 select FSL_LAW 583 select SYS_FSL_ERRATUM_A005125 584 select SYS_FSL_HAS_DDR2 585 select SYS_FSL_HAS_SEC 586 select SYS_FSL_SEC_BE 587 select SYS_FSL_SEC_COMPAT_2 588 select SYS_PPC_E500_USE_DEBUG_TLB 589 select FSL_ELBC 590 591config ARCH_MPC8548 592 bool 593 select FSL_LAW 594 select SYS_FSL_ERRATUM_A005125 595 select SYS_FSL_ERRATUM_NMG_DDR120 596 select SYS_FSL_ERRATUM_NMG_LBC103 597 select SYS_FSL_ERRATUM_NMG_ETSEC129 598 select SYS_FSL_ERRATUM_I2C_A004447 599 select SYS_FSL_HAS_DDR2 600 select SYS_FSL_HAS_DDR1 601 select SYS_FSL_HAS_SEC 602 select SYS_FSL_SEC_BE 603 select SYS_FSL_SEC_COMPAT_2 604 select SYS_PPC_E500_USE_DEBUG_TLB 605 imply CMD_REGINFO 606 607config ARCH_MPC8555 608 bool 609 select FSL_LAW 610 select SYS_FSL_HAS_DDR1 611 select SYS_FSL_HAS_SEC 612 select SYS_FSL_SEC_BE 613 select SYS_FSL_SEC_COMPAT_2 614 615config ARCH_MPC8560 616 bool 617 select FSL_LAW 618 select SYS_FSL_HAS_DDR1 619 620config ARCH_MPC8568 621 bool 622 select FSL_LAW 623 select SYS_FSL_HAS_DDR2 624 select SYS_FSL_HAS_SEC 625 select SYS_FSL_SEC_BE 626 select SYS_FSL_SEC_COMPAT_2 627 628config ARCH_MPC8569 629 bool 630 select FSL_LAW 631 select SYS_FSL_ERRATUM_A004508 632 select SYS_FSL_ERRATUM_A005125 633 select SYS_FSL_HAS_DDR3 634 select SYS_FSL_HAS_SEC 635 select SYS_FSL_SEC_BE 636 select SYS_FSL_SEC_COMPAT_2 637 select FSL_ELBC 638 imply CMD_NAND 639 640config ARCH_MPC8572 641 bool 642 select FSL_LAW 643 select SYS_FSL_ERRATUM_A004508 644 select SYS_FSL_ERRATUM_A005125 645 select SYS_FSL_ERRATUM_DDR_115 646 select SYS_FSL_ERRATUM_DDR111_DDR134 647 select SYS_FSL_HAS_DDR2 648 select SYS_FSL_HAS_DDR3 649 select SYS_FSL_HAS_SEC 650 select SYS_FSL_SEC_BE 651 select SYS_FSL_SEC_COMPAT_2 652 select SYS_PPC_E500_USE_DEBUG_TLB 653 select FSL_ELBC 654 imply CMD_NAND 655 656config ARCH_P1010 657 bool 658 select FSL_LAW 659 select SYS_FSL_ERRATUM_A004477 660 select SYS_FSL_ERRATUM_A004508 661 select SYS_FSL_ERRATUM_A005125 662 select SYS_FSL_ERRATUM_A005275 663 select SYS_FSL_ERRATUM_A006261 664 select SYS_FSL_ERRATUM_A007075 665 select SYS_FSL_ERRATUM_ESDHC111 666 select SYS_FSL_ERRATUM_I2C_A004447 667 select SYS_FSL_ERRATUM_IFC_A002769 668 select SYS_FSL_ERRATUM_P1010_A003549 669 select SYS_FSL_ERRATUM_SEC_A003571 670 select SYS_FSL_ERRATUM_IFC_A003399 671 select SYS_FSL_HAS_DDR3 672 select SYS_FSL_HAS_SEC 673 select SYS_FSL_SEC_BE 674 select SYS_FSL_SEC_COMPAT_4 675 select SYS_PPC_E500_USE_DEBUG_TLB 676 select FSL_IFC 677 imply CMD_EEPROM 678 imply CMD_MTDPARTS 679 imply CMD_NAND 680 imply CMD_SATA 681 imply CMD_PCI 682 imply CMD_REGINFO 683 imply FSL_SATA 684 685config ARCH_P1011 686 bool 687 select FSL_LAW 688 select SYS_FSL_ERRATUM_A004508 689 select SYS_FSL_ERRATUM_A005125 690 select SYS_FSL_ERRATUM_ELBC_A001 691 select SYS_FSL_ERRATUM_ESDHC111 692 select SYS_FSL_HAS_DDR3 693 select SYS_FSL_HAS_SEC 694 select SYS_FSL_SEC_BE 695 select SYS_FSL_SEC_COMPAT_2 696 select SYS_PPC_E500_USE_DEBUG_TLB 697 select FSL_ELBC 698 699config ARCH_P1020 700 bool 701 select FSL_LAW 702 select SYS_FSL_ERRATUM_A004508 703 select SYS_FSL_ERRATUM_A005125 704 select SYS_FSL_ERRATUM_ELBC_A001 705 select SYS_FSL_ERRATUM_ESDHC111 706 select SYS_FSL_HAS_DDR3 707 select SYS_FSL_HAS_SEC 708 select SYS_FSL_SEC_BE 709 select SYS_FSL_SEC_COMPAT_2 710 select SYS_PPC_E500_USE_DEBUG_TLB 711 select FSL_ELBC 712 imply CMD_NAND 713 imply CMD_SATA 714 imply CMD_PCI 715 imply CMD_REGINFO 716 imply SATA_SIL 717 718config ARCH_P1021 719 bool 720 select FSL_LAW 721 select SYS_FSL_ERRATUM_A004508 722 select SYS_FSL_ERRATUM_A005125 723 select SYS_FSL_ERRATUM_ELBC_A001 724 select SYS_FSL_ERRATUM_ESDHC111 725 select SYS_FSL_HAS_DDR3 726 select SYS_FSL_HAS_SEC 727 select SYS_FSL_SEC_BE 728 select SYS_FSL_SEC_COMPAT_2 729 select SYS_PPC_E500_USE_DEBUG_TLB 730 select FSL_ELBC 731 imply CMD_REGINFO 732 imply CMD_NAND 733 imply CMD_SATA 734 imply CMD_REGINFO 735 imply SATA_SIL 736 737config ARCH_P1022 738 bool 739 select FSL_LAW 740 select SYS_FSL_ERRATUM_A004477 741 select SYS_FSL_ERRATUM_A004508 742 select SYS_FSL_ERRATUM_A005125 743 select SYS_FSL_ERRATUM_ELBC_A001 744 select SYS_FSL_ERRATUM_ESDHC111 745 select SYS_FSL_ERRATUM_SATA_A001 746 select SYS_FSL_HAS_DDR3 747 select SYS_FSL_HAS_SEC 748 select SYS_FSL_SEC_BE 749 select SYS_FSL_SEC_COMPAT_2 750 select SYS_PPC_E500_USE_DEBUG_TLB 751 select FSL_ELBC 752 753config ARCH_P1023 754 bool 755 select FSL_LAW 756 select SYS_FSL_ERRATUM_A004508 757 select SYS_FSL_ERRATUM_A005125 758 select SYS_FSL_ERRATUM_I2C_A004447 759 select SYS_FSL_HAS_DDR3 760 select SYS_FSL_HAS_SEC 761 select SYS_FSL_SEC_BE 762 select SYS_FSL_SEC_COMPAT_4 763 select FSL_ELBC 764 765config ARCH_P1024 766 bool 767 select FSL_LAW 768 select SYS_FSL_ERRATUM_A004508 769 select SYS_FSL_ERRATUM_A005125 770 select SYS_FSL_ERRATUM_ELBC_A001 771 select SYS_FSL_ERRATUM_ESDHC111 772 select SYS_FSL_HAS_DDR3 773 select SYS_FSL_HAS_SEC 774 select SYS_FSL_SEC_BE 775 select SYS_FSL_SEC_COMPAT_2 776 select SYS_PPC_E500_USE_DEBUG_TLB 777 select FSL_ELBC 778 imply CMD_EEPROM 779 imply CMD_NAND 780 imply CMD_SATA 781 imply CMD_PCI 782 imply CMD_REGINFO 783 imply SATA_SIL 784 785config ARCH_P1025 786 bool 787 select FSL_LAW 788 select SYS_FSL_ERRATUM_A004508 789 select SYS_FSL_ERRATUM_A005125 790 select SYS_FSL_ERRATUM_ELBC_A001 791 select SYS_FSL_ERRATUM_ESDHC111 792 select SYS_FSL_HAS_DDR3 793 select SYS_FSL_HAS_SEC 794 select SYS_FSL_SEC_BE 795 select SYS_FSL_SEC_COMPAT_2 796 select SYS_PPC_E500_USE_DEBUG_TLB 797 select FSL_ELBC 798 imply CMD_SATA 799 imply CMD_REGINFO 800 801config ARCH_P2020 802 bool 803 select FSL_LAW 804 select SYS_FSL_ERRATUM_A004477 805 select SYS_FSL_ERRATUM_A004508 806 select SYS_FSL_ERRATUM_A005125 807 select SYS_FSL_ERRATUM_ESDHC111 808 select SYS_FSL_ERRATUM_ESDHC_A001 809 select SYS_FSL_HAS_DDR3 810 select SYS_FSL_HAS_SEC 811 select SYS_FSL_SEC_BE 812 select SYS_FSL_SEC_COMPAT_2 813 select SYS_PPC_E500_USE_DEBUG_TLB 814 select FSL_ELBC 815 imply CMD_EEPROM 816 imply CMD_NAND 817 imply CMD_REGINFO 818 819config ARCH_P2041 820 bool 821 select E500MC 822 select FSL_LAW 823 select SYS_FSL_ERRATUM_A004510 824 select SYS_FSL_ERRATUM_A004849 825 select SYS_FSL_ERRATUM_A005275 826 select SYS_FSL_ERRATUM_A006261 827 select SYS_FSL_ERRATUM_CPU_A003999 828 select SYS_FSL_ERRATUM_DDR_A003 829 select SYS_FSL_ERRATUM_DDR_A003474 830 select SYS_FSL_ERRATUM_ESDHC111 831 select SYS_FSL_ERRATUM_I2C_A004447 832 select SYS_FSL_ERRATUM_NMG_CPU_A011 833 select SYS_FSL_ERRATUM_SRIO_A004034 834 select SYS_FSL_ERRATUM_USB14 835 select SYS_FSL_HAS_DDR3 836 select SYS_FSL_HAS_SEC 837 select SYS_FSL_QORIQ_CHASSIS1 838 select SYS_FSL_SEC_BE 839 select SYS_FSL_SEC_COMPAT_4 840 select FSL_ELBC 841 imply CMD_NAND 842 843config ARCH_P3041 844 bool 845 select E500MC 846 select FSL_LAW 847 select SYS_FSL_DDR_VER_44 848 select SYS_FSL_ERRATUM_A004510 849 select SYS_FSL_ERRATUM_A004849 850 select SYS_FSL_ERRATUM_A005275 851 select SYS_FSL_ERRATUM_A005812 852 select SYS_FSL_ERRATUM_A006261 853 select SYS_FSL_ERRATUM_CPU_A003999 854 select SYS_FSL_ERRATUM_DDR_A003 855 select SYS_FSL_ERRATUM_DDR_A003474 856 select SYS_FSL_ERRATUM_ESDHC111 857 select SYS_FSL_ERRATUM_I2C_A004447 858 select SYS_FSL_ERRATUM_NMG_CPU_A011 859 select SYS_FSL_ERRATUM_SRIO_A004034 860 select SYS_FSL_ERRATUM_USB14 861 select SYS_FSL_HAS_DDR3 862 select SYS_FSL_HAS_SEC 863 select SYS_FSL_QORIQ_CHASSIS1 864 select SYS_FSL_SEC_BE 865 select SYS_FSL_SEC_COMPAT_4 866 select FSL_ELBC 867 imply CMD_NAND 868 imply CMD_SATA 869 imply CMD_REGINFO 870 imply FSL_SATA 871 872config ARCH_P4080 873 bool 874 select E500MC 875 select FSL_LAW 876 select SYS_FSL_DDR_VER_44 877 select SYS_FSL_ERRATUM_A004510 878 select SYS_FSL_ERRATUM_A004580 879 select SYS_FSL_ERRATUM_A004849 880 select SYS_FSL_ERRATUM_A005812 881 select SYS_FSL_ERRATUM_A007075 882 select SYS_FSL_ERRATUM_CPC_A002 883 select SYS_FSL_ERRATUM_CPC_A003 884 select SYS_FSL_ERRATUM_CPU_A003999 885 select SYS_FSL_ERRATUM_DDR_A003 886 select SYS_FSL_ERRATUM_DDR_A003474 887 select SYS_FSL_ERRATUM_ELBC_A001 888 select SYS_FSL_ERRATUM_ESDHC111 889 select SYS_FSL_ERRATUM_ESDHC13 890 select SYS_FSL_ERRATUM_ESDHC135 891 select SYS_FSL_ERRATUM_I2C_A004447 892 select SYS_FSL_ERRATUM_NMG_CPU_A011 893 select SYS_FSL_ERRATUM_SRIO_A004034 894 select SYS_P4080_ERRATUM_CPU22 895 select SYS_P4080_ERRATUM_PCIE_A003 896 select SYS_P4080_ERRATUM_SERDES8 897 select SYS_P4080_ERRATUM_SERDES9 898 select SYS_P4080_ERRATUM_SERDES_A001 899 select SYS_P4080_ERRATUM_SERDES_A005 900 select SYS_FSL_HAS_DDR3 901 select SYS_FSL_HAS_SEC 902 select SYS_FSL_QORIQ_CHASSIS1 903 select SYS_FSL_SEC_BE 904 select SYS_FSL_SEC_COMPAT_4 905 select FSL_ELBC 906 imply CMD_SATA 907 imply CMD_REGINFO 908 imply SATA_SIL 909 910config ARCH_P5020 911 bool 912 select E500MC 913 select FSL_LAW 914 select SYS_FSL_DDR_VER_44 915 select SYS_FSL_ERRATUM_A004510 916 select SYS_FSL_ERRATUM_A005275 917 select SYS_FSL_ERRATUM_A006261 918 select SYS_FSL_ERRATUM_DDR_A003 919 select SYS_FSL_ERRATUM_DDR_A003474 920 select SYS_FSL_ERRATUM_ESDHC111 921 select SYS_FSL_ERRATUM_I2C_A004447 922 select SYS_FSL_ERRATUM_SRIO_A004034 923 select SYS_FSL_ERRATUM_USB14 924 select SYS_FSL_HAS_DDR3 925 select SYS_FSL_HAS_SEC 926 select SYS_FSL_QORIQ_CHASSIS1 927 select SYS_FSL_SEC_BE 928 select SYS_FSL_SEC_COMPAT_4 929 select SYS_PPC64 930 select FSL_ELBC 931 imply CMD_SATA 932 imply CMD_REGINFO 933 imply FSL_SATA 934 935config ARCH_P5040 936 bool 937 select E500MC 938 select FSL_LAW 939 select SYS_FSL_DDR_VER_44 940 select SYS_FSL_ERRATUM_A004510 941 select SYS_FSL_ERRATUM_A004699 942 select SYS_FSL_ERRATUM_A005275 943 select SYS_FSL_ERRATUM_A005812 944 select SYS_FSL_ERRATUM_A006261 945 select SYS_FSL_ERRATUM_DDR_A003 946 select SYS_FSL_ERRATUM_DDR_A003474 947 select SYS_FSL_ERRATUM_ESDHC111 948 select SYS_FSL_ERRATUM_USB14 949 select SYS_FSL_HAS_DDR3 950 select SYS_FSL_HAS_SEC 951 select SYS_FSL_QORIQ_CHASSIS1 952 select SYS_FSL_SEC_BE 953 select SYS_FSL_SEC_COMPAT_4 954 select SYS_PPC64 955 select FSL_ELBC 956 imply CMD_SATA 957 imply CMD_REGINFO 958 imply FSL_SATA 959 960config ARCH_QEMU_E500 961 bool 962 963config ARCH_T1023 964 bool 965 select E500MC 966 select FSL_LAW 967 select SYS_FSL_DDR_VER_50 968 select SYS_FSL_ERRATUM_A008378 969 select SYS_FSL_ERRATUM_A009663 970 select SYS_FSL_ERRATUM_A009942 971 select SYS_FSL_ERRATUM_ESDHC111 972 select SYS_FSL_HAS_DDR3 973 select SYS_FSL_HAS_DDR4 974 select SYS_FSL_HAS_SEC 975 select SYS_FSL_QORIQ_CHASSIS2 976 select SYS_FSL_SEC_BE 977 select SYS_FSL_SEC_COMPAT_5 978 select FSL_IFC 979 imply CMD_EEPROM 980 imply CMD_NAND 981 imply CMD_REGINFO 982 983config ARCH_T1024 984 bool 985 select E500MC 986 select FSL_LAW 987 select SYS_FSL_DDR_VER_50 988 select SYS_FSL_ERRATUM_A008378 989 select SYS_FSL_ERRATUM_A009663 990 select SYS_FSL_ERRATUM_A009942 991 select SYS_FSL_ERRATUM_ESDHC111 992 select SYS_FSL_HAS_DDR3 993 select SYS_FSL_HAS_DDR4 994 select SYS_FSL_HAS_SEC 995 select SYS_FSL_QORIQ_CHASSIS2 996 select SYS_FSL_SEC_BE 997 select SYS_FSL_SEC_COMPAT_5 998 select FSL_IFC 999 imply CMD_EEPROM 1000 imply CMD_NAND
1001 imply CMD_MTDPARTS 1002 imply CMD_REGINFO 1003 1004config ARCH_T1040 1005 bool 1006 select E500MC 1007 select FSL_LAW 1008 select SYS_FSL_DDR_VER_50 1009 select SYS_FSL_ERRATUM_A008044 1010 select SYS_FSL_ERRATUM_A008378 1011 select SYS_FSL_ERRATUM_A009663 1012 select SYS_FSL_ERRATUM_A009942 1013 select SYS_FSL_ERRATUM_ESDHC111 1014 select SYS_FSL_HAS_DDR3 1015 select SYS_FSL_HAS_DDR4 1016 select SYS_FSL_HAS_SEC 1017 select SYS_FSL_QORIQ_CHASSIS2 1018 select SYS_FSL_SEC_BE 1019 select SYS_FSL_SEC_COMPAT_5 1020 select FSL_IFC 1021 imply CMD_MTDPARTS 1022 imply CMD_NAND 1023 imply CMD_SATA 1024 imply CMD_REGINFO 1025 imply FSL_SATA 1026 1027config ARCH_T1042 1028 bool 1029 select E500MC 1030 select FSL_LAW 1031 select SYS_FSL_DDR_VER_50 1032 select SYS_FSL_ERRATUM_A008044 1033 select SYS_FSL_ERRATUM_A008378 1034 select SYS_FSL_ERRATUM_A009663 1035 select SYS_FSL_ERRATUM_A009942 1036 select SYS_FSL_ERRATUM_ESDHC111 1037 select SYS_FSL_HAS_DDR3 1038 select SYS_FSL_HAS_DDR4 1039 select SYS_FSL_HAS_SEC 1040 select SYS_FSL_QORIQ_CHASSIS2 1041 select SYS_FSL_SEC_BE 1042 select SYS_FSL_SEC_COMPAT_5 1043 select FSL_IFC 1044 imply CMD_MTDPARTS 1045 imply CMD_NAND 1046 imply CMD_SATA 1047 imply CMD_REGINFO 1048 imply FSL_SATA 1049 1050config ARCH_T2080 1051 bool 1052 select E500MC 1053 select E6500 1054 select FSL_LAW 1055 select SYS_FSL_DDR_VER_47 1056 select SYS_FSL_ERRATUM_A006379 1057 select SYS_FSL_ERRATUM_A006593 1058 select SYS_FSL_ERRATUM_A007186 1059 select SYS_FSL_ERRATUM_A007212 1060 select SYS_FSL_ERRATUM_A007815 1061 select SYS_FSL_ERRATUM_A007907 1062 select SYS_FSL_ERRATUM_A009942 1063 select SYS_FSL_ERRATUM_ESDHC111 1064 select SYS_FSL_HAS_DDR3 1065 select SYS_FSL_HAS_SEC 1066 select SYS_FSL_QORIQ_CHASSIS2 1067 select SYS_FSL_SEC_BE 1068 select SYS_FSL_SEC_COMPAT_4 1069 select SYS_PPC64 1070 select FSL_IFC 1071 imply CMD_SATA 1072 imply CMD_NAND 1073 imply CMD_REGINFO 1074 imply FSL_SATA 1075 1076config ARCH_T2081 1077 bool 1078 select E500MC 1079 select E6500 1080 select FSL_LAW 1081 select SYS_FSL_DDR_VER_47 1082 select SYS_FSL_ERRATUM_A006379 1083 select SYS_FSL_ERRATUM_A006593 1084 select SYS_FSL_ERRATUM_A007186 1085 select SYS_FSL_ERRATUM_A007212 1086 select SYS_FSL_ERRATUM_A009942 1087 select SYS_FSL_ERRATUM_ESDHC111 1088 select SYS_FSL_HAS_DDR3 1089 select SYS_FSL_HAS_SEC 1090 select SYS_FSL_QORIQ_CHASSIS2 1091 select SYS_FSL_SEC_BE 1092 select SYS_FSL_SEC_COMPAT_4 1093 select SYS_PPC64 1094 select FSL_IFC 1095 imply CMD_NAND 1096 imply CMD_REGINFO 1097 1098config ARCH_T4160 1099 bool 1100 select E500MC 1101 select E6500 1102 select FSL_LAW 1103 select SYS_FSL_DDR_VER_47 1104 select SYS_FSL_ERRATUM_A004468 1105 select SYS_FSL_ERRATUM_A005871 1106 select SYS_FSL_ERRATUM_A006379 1107 select SYS_FSL_ERRATUM_A006593 1108 select SYS_FSL_ERRATUM_A007186 1109 select SYS_FSL_ERRATUM_A007798 1110 select SYS_FSL_ERRATUM_A009942 1111 select SYS_FSL_HAS_DDR3 1112 select SYS_FSL_HAS_SEC 1113 select SYS_FSL_QORIQ_CHASSIS2 1114 select SYS_FSL_SEC_BE 1115 select SYS_FSL_SEC_COMPAT_4 1116 select SYS_PPC64 1117 select FSL_IFC 1118 imply CMD_SATA 1119 imply CMD_NAND 1120 imply CMD_REGINFO 1121 imply FSL_SATA 1122 1123config ARCH_T4240 1124 bool 1125 select E500MC 1126 select E6500 1127 select FSL_LAW 1128 select SYS_FSL_DDR_VER_47 1129 select SYS_FSL_ERRATUM_A004468 1130 select SYS_FSL_ERRATUM_A005871 1131 select SYS_FSL_ERRATUM_A006261 1132 select SYS_FSL_ERRATUM_A006379 1133 select SYS_FSL_ERRATUM_A006593 1134 select SYS_FSL_ERRATUM_A007186 1135 select SYS_FSL_ERRATUM_A007798 1136 select SYS_FSL_ERRATUM_A007815 1137 select SYS_FSL_ERRATUM_A007907 1138 select SYS_FSL_ERRATUM_A009942 1139 select SYS_FSL_HAS_DDR3 1140 select SYS_FSL_HAS_SEC 1141 select SYS_FSL_QORIQ_CHASSIS2 1142 select SYS_FSL_SEC_BE 1143 select SYS_FSL_SEC_COMPAT_4 1144 select SYS_PPC64 1145 select FSL_IFC 1146 imply CMD_SATA 1147 imply CMD_NAND 1148 imply CMD_REGINFO 1149 imply FSL_SATA 1150 1151config MPC85XX_HAVE_RESET_VECTOR 1152 bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" 1153 depends on MPC85xx 1154 1155config BOOKE 1156 bool 1157 default y 1158 1159config E500 1160 bool 1161 default y 1162 help 1163 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc 1164 1165config E500MC 1166 bool 1167 imply CMD_PCI 1168 help 1169 Enble PowerPC E500MC core 1170 1171config E6500 1172 bool 1173 help 1174 Enable PowerPC E6500 core 1175 1176config FSL_LAW 1177 bool 1178 help 1179 Use Freescale common code for Local Access Window 1180 1181config SECURE_BOOT 1182 bool "Secure Boot" 1183 help 1184 Enable Freescale Secure Boot feature. Normally selected 1185 by defconfig. If unsure, do not change. 1186 1187config MAX_CPUS 1188 int "Maximum number of CPUs permitted for MPC85xx" 1189 default 12 if ARCH_T4240 1190 default 8 if ARCH_P4080 || \ 1191 ARCH_T4160 1192 default 4 if ARCH_B4860 || \ 1193 ARCH_P2041 || \ 1194 ARCH_P3041 || \ 1195 ARCH_P5040 || \ 1196 ARCH_T1040 || \ 1197 ARCH_T1042 || \ 1198 ARCH_T2080 || \ 1199 ARCH_T2081 1200 default 2 if ARCH_B4420 || \ 1201 ARCH_BSC9132 || \ 1202 ARCH_MPC8572 || \ 1203 ARCH_P1020 || \ 1204 ARCH_P1021 || \ 1205 ARCH_P1022 || \ 1206 ARCH_P1023 || \ 1207 ARCH_P1024 || \ 1208 ARCH_P1025 || \ 1209 ARCH_P2020 || \ 1210 ARCH_P5020 || \ 1211 ARCH_T1023 || \ 1212 ARCH_T1024 1213 default 1 1214 help 1215 Set this number to the maximum number of possible CPUs in the SoC. 1216 SoCs may have multiple clusters with each cluster may have multiple 1217 ports. If some ports are reserved but higher ports are used for 1218 cores, count the reserved ports. This will allocate enough memory 1219 in spin table to properly handle all cores. 1220 1221config SYS_CCSRBAR_DEFAULT 1222 hex "Default CCSRBAR address" 1223 default 0xff700000 if ARCH_BSC9131 || \ 1224 ARCH_BSC9132 || \ 1225 ARCH_C29X || \ 1226 ARCH_MPC8536 || \ 1227 ARCH_MPC8540 || \ 1228 ARCH_MPC8541 || \ 1229 ARCH_MPC8544 || \ 1230 ARCH_MPC8548 || \ 1231 ARCH_MPC8555 || \ 1232 ARCH_MPC8560 || \ 1233 ARCH_MPC8568 || \ 1234 ARCH_MPC8569 || \ 1235 ARCH_MPC8572 || \ 1236 ARCH_P1010 || \ 1237 ARCH_P1011 || \ 1238 ARCH_P1020 || \ 1239 ARCH_P1021 || \ 1240 ARCH_P1022 || \ 1241 ARCH_P1024 || \ 1242 ARCH_P1025 || \ 1243 ARCH_P2020 1244 default 0xff600000 if ARCH_P1023 1245 default 0xfe000000 if ARCH_B4420 || \ 1246 ARCH_B4860 || \ 1247 ARCH_P2041 || \ 1248 ARCH_P3041 || \ 1249 ARCH_P4080 || \ 1250 ARCH_P5020 || \ 1251 ARCH_P5040 || \ 1252 ARCH_T1023 || \ 1253 ARCH_T1024 || \ 1254 ARCH_T1040 || \ 1255 ARCH_T1042 || \ 1256 ARCH_T2080 || \ 1257 ARCH_T2081 || \ 1258 ARCH_T4160 || \ 1259 ARCH_T4240 1260 default 0xe0000000 if ARCH_QEMU_E500 1261 help 1262 Default value of CCSRBAR comes from power-on-reset. It 1263 is fixed on each SoC. Some SoCs can have different value 1264 if changed by pre-boot regime. The value here must match 1265 the current value in SoC. If not sure, do not change. 1266 1267config SYS_FSL_ERRATUM_A004468 1268 bool 1269 1270config SYS_FSL_ERRATUM_A004477 1271 bool 1272 1273config SYS_FSL_ERRATUM_A004508 1274 bool 1275 1276config SYS_FSL_ERRATUM_A004580 1277 bool 1278 1279config SYS_FSL_ERRATUM_A004699 1280 bool 1281 1282config SYS_FSL_ERRATUM_A004849 1283 bool 1284 1285config SYS_FSL_ERRATUM_A004510 1286 bool 1287 1288config SYS_FSL_ERRATUM_A004510_SVR_REV 1289 hex 1290 depends on SYS_FSL_ERRATUM_A004510 1291 default 0x20 if ARCH_P4080 1292 default 0x10 1293 1294config SYS_FSL_ERRATUM_A004510_SVR_REV2 1295 hex 1296 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) 1297 default 0x11 1298 1299config SYS_FSL_ERRATUM_A005125 1300 bool 1301 1302config SYS_FSL_ERRATUM_A005434 1303 bool 1304 1305config SYS_FSL_ERRATUM_A005812 1306 bool 1307 1308config SYS_FSL_ERRATUM_A005871 1309 bool 1310 1311config SYS_FSL_ERRATUM_A005275 1312 bool 1313 1314config SYS_FSL_ERRATUM_A006261 1315 bool 1316 1317config SYS_FSL_ERRATUM_A006379 1318 bool 1319 1320config SYS_FSL_ERRATUM_A006384 1321 bool 1322 1323config SYS_FSL_ERRATUM_A006475 1324 bool 1325 1326config SYS_FSL_ERRATUM_A006593 1327 bool 1328 1329config SYS_FSL_ERRATUM_A007075 1330 bool 1331 1332config SYS_FSL_ERRATUM_A007186 1333 bool 1334 1335config SYS_FSL_ERRATUM_A007212 1336 bool 1337 1338config SYS_FSL_ERRATUM_A007815 1339 bool 1340 1341config SYS_FSL_ERRATUM_A007798 1342 bool 1343 1344config SYS_FSL_ERRATUM_A007907 1345 bool 1346 1347config SYS_FSL_ERRATUM_A008044 1348 bool 1349 1350config SYS_FSL_ERRATUM_CPC_A002 1351 bool 1352 1353config SYS_FSL_ERRATUM_CPC_A003 1354 bool 1355 1356config SYS_FSL_ERRATUM_CPU_A003999 1357 bool 1358 1359config SYS_FSL_ERRATUM_ELBC_A001 1360 bool 1361 1362config SYS_FSL_ERRATUM_I2C_A004447 1363 bool 1364 1365config SYS_FSL_A004447_SVR_REV 1366 hex 1367 depends on SYS_FSL_ERRATUM_I2C_A004447 1368 default 0x00 if ARCH_MPC8548 1369 default 0x10 if ARCH_P1010 1370 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 1371 default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 1372 1373config SYS_FSL_ERRATUM_IFC_A002769 1374 bool 1375 1376config SYS_FSL_ERRATUM_IFC_A003399 1377 bool 1378 1379config SYS_FSL_ERRATUM_NMG_CPU_A011 1380 bool 1381 1382config SYS_FSL_ERRATUM_NMG_ETSEC129 1383 bool 1384 1385config SYS_FSL_ERRATUM_NMG_LBC103 1386 bool 1387 1388config SYS_FSL_ERRATUM_P1010_A003549 1389 bool 1390 1391config SYS_FSL_ERRATUM_SATA_A001 1392 bool 1393 1394config SYS_FSL_ERRATUM_SEC_A003571 1395 bool 1396 1397config SYS_FSL_ERRATUM_SRIO_A004034 1398 bool 1399 1400config SYS_FSL_ERRATUM_USB14 1401 bool 1402 1403config SYS_P4080_ERRATUM_CPU22 1404 bool 1405 1406config SYS_P4080_ERRATUM_PCIE_A003 1407 bool 1408 1409config SYS_P4080_ERRATUM_SERDES8 1410 bool 1411 1412config SYS_P4080_ERRATUM_SERDES9 1413 bool 1414 1415config SYS_P4080_ERRATUM_SERDES_A001 1416 bool 1417 1418config SYS_P4080_ERRATUM_SERDES_A005 1419 bool 1420 1421config SYS_FSL_QORIQ_CHASSIS1 1422 bool 1423 1424config SYS_FSL_QORIQ_CHASSIS2 1425 bool 1426 1427config SYS_FSL_NUM_LAWS 1428 int "Number of local access windows" 1429 depends on FSL_LAW 1430 default 32 if ARCH_B4420 || \ 1431 ARCH_B4860 || \ 1432 ARCH_P2041 || \ 1433 ARCH_P3041 || \ 1434 ARCH_P4080 || \ 1435 ARCH_P5020 || \ 1436 ARCH_P5040 || \ 1437 ARCH_T2080 || \ 1438 ARCH_T2081 || \ 1439 ARCH_T4160 || \ 1440 ARCH_T4240 1441 default 16 if ARCH_T1023 || \ 1442 ARCH_T1024 || \ 1443 ARCH_T1040 || \ 1444 ARCH_T1042 1445 default 12 if ARCH_BSC9131 || \ 1446 ARCH_BSC9132 || \ 1447 ARCH_C29X || \ 1448 ARCH_MPC8536 || \ 1449 ARCH_MPC8572 || \ 1450 ARCH_P1010 || \ 1451 ARCH_P1011 || \ 1452 ARCH_P1020 || \ 1453 ARCH_P1021 || \ 1454 ARCH_P1022 || \ 1455 ARCH_P1023 || \ 1456 ARCH_P1024 || \ 1457 ARCH_P1025 || \ 1458 ARCH_P2020 1459 default 10 if ARCH_MPC8544 || \ 1460 ARCH_MPC8548 || \ 1461 ARCH_MPC8568 || \ 1462 ARCH_MPC8569 1463 default 8 if ARCH_MPC8540 || \ 1464 ARCH_MPC8541 || \ 1465 ARCH_MPC8555 || \ 1466 ARCH_MPC8560 1467 help 1468 Number of local access windows. This is fixed per SoC. 1469 If not sure, do not change. 1470 1471config SYS_FSL_THREADS_PER_CORE 1472 int 1473 default 2 if E6500 1474 default 1 1475 1476config SYS_NUM_TLBCAMS 1477 int "Number of TLB CAM entries" 1478 default 64 if E500MC 1479 default 16 1480 help 1481 Number of TLB CAM entries for Book-E chips. 64 for E500MC, 1482 16 for other E500 SoCs. 1483 1484config SYS_PPC64 1485 bool 1486 1487config SYS_PPC_E500_USE_DEBUG_TLB 1488 bool 1489 1490config FSL_IFC 1491 bool 1492 1493config FSL_ELBC 1494 bool 1495 1496config SYS_PPC_E500_DEBUG_TLB 1497 int "Temporary TLB entry for external debugger" 1498 depends on SYS_PPC_E500_USE_DEBUG_TLB 1499 default 0 if ARCH_MPC8544 || ARCH_MPC8548 1500 default 1 if ARCH_MPC8536 1501 default 2 if ARCH_MPC8572 || \ 1502 ARCH_P1011 || \ 1503 ARCH_P1020 || \ 1504 ARCH_P1021 || \ 1505 ARCH_P1022 || \ 1506 ARCH_P1024 || \ 1507 ARCH_P1025 || \ 1508 ARCH_P2020 1509 default 3 if ARCH_P1010 || \ 1510 ARCH_BSC9132 || \ 1511 ARCH_C29X 1512 help 1513 Select a temporary TLB entry to be used during boot to work 1514 around limitations in e500v1 and e500v2 external debugger 1515 support. This reduces the portions of the boot code where 1516 breakpoints and single stepping do not work. The value of this 1517 symbol should be set to the TLB1 entry to be used for this 1518 purpose. If unsure, do not change. 1519 1520config SYS_FSL_IFC_CLK_DIV 1521 int "Divider of platform clock" 1522 depends on FSL_IFC 1523 default 2 if ARCH_B4420 || \ 1524 ARCH_B4860 || \ 1525 ARCH_T1024 || \ 1526 ARCH_T1023 || \ 1527 ARCH_T1040 || \ 1528 ARCH_T1042 || \ 1529 ARCH_T4160 || \ 1530 ARCH_T4240 1531 default 1 1532 help 1533 Defines divider of platform clock(clock input to 1534 IFC controller). 1535 1536config SYS_FSL_LBC_CLK_DIV 1537 int "Divider of platform clock" 1538 depends on FSL_ELBC || ARCH_MPC8540 || \ 1539 ARCH_MPC8548 || ARCH_MPC8541 || \ 1540 ARCH_MPC8555 || ARCH_MPC8560 || \ 1541 ARCH_MPC8568 1542 1543 default 2 if ARCH_P2041 || \ 1544 ARCH_P3041 || \ 1545 ARCH_P4080 || \ 1546 ARCH_P5020 || \ 1547 ARCH_P5040 1548 default 1 1549 1550 help 1551 Defines divider of platform clock(clock input to 1552 eLBC controller). 1553 1554source "board/freescale/b4860qds/Kconfig" 1555source "board/freescale/bsc9131rdb/Kconfig" 1556source "board/freescale/bsc9132qds/Kconfig" 1557source "board/freescale/c29xpcie/Kconfig" 1558source "board/freescale/corenet_ds/Kconfig" 1559source "board/freescale/mpc8536ds/Kconfig" 1560source "board/freescale/mpc8541cds/Kconfig" 1561source "board/freescale/mpc8544ds/Kconfig" 1562source "board/freescale/mpc8548cds/Kconfig" 1563source "board/freescale/mpc8555cds/Kconfig" 1564source "board/freescale/mpc8568mds/Kconfig" 1565source "board/freescale/mpc8569mds/Kconfig" 1566source "board/freescale/mpc8572ds/Kconfig" 1567source "board/freescale/p1010rdb/Kconfig" 1568source "board/freescale/p1022ds/Kconfig" 1569source "board/freescale/p1023rdb/Kconfig" 1570source "board/freescale/p1_p2_rdb_pc/Kconfig" 1571source "board/freescale/p1_twr/Kconfig" 1572source "board/freescale/p2041rdb/Kconfig" 1573source "board/freescale/qemu-ppce500/Kconfig" 1574source "board/freescale/t102xqds/Kconfig" 1575source "board/freescale/t102xrdb/Kconfig" 1576source "board/freescale/t1040qds/Kconfig" 1577source "board/freescale/t104xrdb/Kconfig" 1578source "board/freescale/t208xqds/Kconfig" 1579source "board/freescale/t208xrdb/Kconfig" 1580source "board/freescale/t4qds/Kconfig" 1581source "board/freescale/t4rdb/Kconfig" 1582source "board/gdsys/p1022/Kconfig" 1583source "board/keymile/kmp204x/Kconfig" 1584source "board/sbc8548/Kconfig" 1585source "board/socrates/Kconfig" 1586source "board/varisys/cyrus/Kconfig" 1587source "board/xes/xpedite520x/Kconfig" 1588source "board/xes/xpedite537x/Kconfig" 1589source "board/xes/xpedite550x/Kconfig" 1590source "board/Arcturus/ucp1020/Kconfig" 1591 1592endmenu 1593