LXR uboot/include/configs/devkit8000.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2006-2008
   4 * Texas Instruments.
   5 * Richard Woodruff <r-woodruff2@ti.com>
   6 * Syed Mohammed Khasim <x0khasim@ti.com>
   7 *
   8 * (C) Copyright 2009
   9 * Frederik Kriewitz <frederik@kriewitz.eu>
  10 *
  11 * Configuration settings for the DevKit8000 board.
  12 */
  13
  14#ifndef __CONFIG_H
  15#define __CONFIG_H
  16
  17/* High Level Configuration Options */
  18#define CONFIG_MACH_TYPE        MACH_TYPE_DEVKIT8000
  19
  20/*
  21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  22 * 64 bytes before this address should be set aside for u-boot.img's
  23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
  24 * other needs.
  25 */
  26
  27#define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
  28#define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  29
  30#define CONFIG_SYS_SPL_MALLOC_START     0x80208000
  31#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
  32
  33/*  Physical Memory Map  */
  34
  35#include <configs/ti_omap3_common.h>
  36
  37#define CONFIG_REVISION_TAG             1
  38
  39/* Size of malloc() pool */
  40#define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  41                                                /* Sector */
  42#undef CONFIG_SYS_MALLOC_LEN
  43#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  44
  45/* Hardware drivers */
  46/* DM9000 */
  47#define CONFIG_NET_RETRY_COUNT          20
  48#define CONFIG_DRIVER_DM9000            1
  49#define CONFIG_DM9000_BASE              0x2c000000
  50#define DM9000_IO                       CONFIG_DM9000_BASE
  51#define DM9000_DATA                     (CONFIG_DM9000_BASE + 0x400)
  52#define CONFIG_DM9000_USE_16BIT         1
  53#define CONFIG_DM9000_NO_SROM           1
  54#undef  CONFIG_DM9000_DEBUG
  55
  56/* TWL4030 */
  57
  58/* Board NAND Info */
  59#define CONFIG_JFFS2_NAND
  60/* nand device jffs2 lives on */
  61#define CONFIG_JFFS2_DEV                "nand0"
  62/* start of jffs2 partition */
  63#define CONFIG_JFFS2_PART_OFFSET        0x680000
  64#define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
  65                                                        /* partition */
  66
  67/* BOOTP/DHCP options */
  68#define CONFIG_BOOTP_NISDOMAIN
  69#define CONFIG_BOOTP_BOOTFILESIZE
  70#define CONFIG_BOOTP_DNS2
  71#define CONFIG_BOOTP_SEND_HOSTNAME
  72#define CONFIG_BOOTP_TIMEOFFSET
  73#undef CONFIG_BOOTP_VENDOREX
  74
  75/* Environment information */
  76#define CONFIG_EXTRA_ENV_SETTINGS \
  77        "loadaddr=0x82000000\0" \
  78        "console=ttyO2,115200n8\0" \
  79        "mmcdev=0\0" \
  80        "vram=12M\0" \
  81        "dvimode=1024x768MR-16@60\0" \
  82        "defaultdisplay=dvi\0" \
  83        "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
  84        "kernelopts=rw\0" \
  85        "commonargs=" \
  86                "setenv bootargs console=${console} " \
  87                "vram=${vram} " \
  88                "omapfb.mode=dvi:${dvimode} " \
  89                "omapdss.def_disp=${defaultdisplay}\0" \
  90        "mmcargs=" \
  91                "run commonargs; " \
  92                "setenv bootargs ${bootargs} " \
  93                "root=/dev/mmcblk0p2 " \
  94                "rootwait " \
  95                "${kernelopts}\0" \
  96        "nandargs=" \
  97                "run commonargs; " \
  98                "setenv bootargs ${bootargs} " \
  99                "omapfb.mode=dvi:${dvimode} " \
 100                "omapdss.def_disp=${defaultdisplay} " \
 101                "root=/dev/mtdblock4 " \
 102                "rootfstype=jffs2 " \
 103                "${kernelopts}\0" \
 104        "netargs=" \
 105                "run commonargs; " \
 106                "setenv bootargs ${bootargs} " \
 107                "root=/dev/nfs " \
 108                "nfsroot=${serverip}:${rootpath},${nfsopts} " \
 109                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
 110                "${kernelopts} " \
 111                "dnsip1=${dnsip} " \
 112                "dnsip2=${dnsip2}\0" \
 113        "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 114        "bootscript=echo Running bootscript from mmc ...; " \
 115                "source ${loadaddr}\0" \
 116        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 117        "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
 118        "mmcboot=echo Booting from mmc ...; " \
 119                "run mmcargs; " \
 120                "bootm ${loadaddr}\0" \
 121        "nandboot=echo Booting from nand ...; " \
 122                "run nandargs; " \
 123                "nand read ${loadaddr} 280000 400000; " \
 124                "bootm ${loadaddr}\0" \
 125        "netboot=echo Booting from network ...; " \
 126                "dhcp ${loadaddr}; " \
 127                "run netargs; " \
 128                "bootm ${loadaddr}\0" \
 129        "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
 130                        "if run loadbootscript; then " \
 131                                "run bootscript; " \
 132                        "else " \
 133                                "if run loaduimage; then " \
 134                                        "run mmcboot; " \
 135                                "else run nandboot; " \
 136                                "fi; " \
 137                        "fi; " \
 138                "else run nandboot; fi\0"
 139
 140#define CONFIG_BOOTCOMMAND "run autoboot"
 141
 142/* Boot Argument Buffer Size */
 143#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x07000000)
 144#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 145                                        0x01000000) /* 16MB */
 146
 147/* NAND and environment organization  */
 148
 149#define CONFIG_ENV_OFFSET               0x260000
 150
 151/* SRAM config */
 152#define CONFIG_SYS_SRAM_START              0x40200000
 153#define CONFIG_SYS_SRAM_SIZE               0x10000
 154
 155/* Defines for SPL */
 156
 157#undef CONFIG_SPL_TEXT_BASE
 158#define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 159
 160/* NAND boot config */
 161#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 162#define CONFIG_SYS_NAND_PAGE_COUNT      64
 163#define CONFIG_SYS_NAND_PAGE_SIZE       2048
 164#define CONFIG_SYS_NAND_OOBSIZE         64
 165#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 166#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 167#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 168                                                10, 11, 12, 13}
 169
 170#define CONFIG_SYS_NAND_ECCSIZE         512
 171#define CONFIG_SYS_NAND_ECCBYTES        3
 172#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
 173
 174#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 175#define CONFIG_SYS_NAND_U_BOOT_SIZE     0x200000
 176
 177/* SPL OS boot options */
 178#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
 179
 180#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
 181#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
 182#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
 183#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
 184#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x8   /* address 0x1000 */
 185#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  8     /* 4KB */
 186
 187#undef CONFIG_SYS_SPL_ARGS_ADDR
 188#define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
 189
 190#endif /* __CONFIG_H */
 191