uboot/include/configs/vcoreiii.h
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   1/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
   2/*
   3 * Copyright (c) 2018 Microsemi Corporation
   4 */
   5
   6#ifndef __VCOREIII_H
   7#define __VCOREIII_H
   8
   9#include <linux/sizes.h>
  10
  11/* Onboard devices */
  12
  13#define CONFIG_SYS_MALLOC_LEN           0x100000
  14#define CONFIG_SYS_LOAD_ADDR            0x00100000
  15#define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  16
  17#define CPU_CLOCK_RATE                  500000000 /* Clock for the MIPS core */
  18#ifdef CONFIG_SOC_LUTON
  19#define CONFIG_SYS_MIPS_TIMER_FREQ      208333333
  20#else
  21#define CONFIG_SYS_MIPS_TIMER_FREQ      (CPU_CLOCK_RATE / 2)
  22#endif
  23#define CONFIG_SYS_NS16550_CLK          CONFIG_SYS_MIPS_TIMER_FREQ
  24
  25#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET)
  26#define CONFIG_ENV_OFFSET               (1024 * 1024)
  27#define CONFIG_ENV_SIZE                 (256 * 1024)
  28#define CONFIG_ENV_SECT_SIZE            (256 * 1024)
  29
  30#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  31#define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
  32#define CONFIG_ENV_OFFSET_REDUND      (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
  33
  34#define CONFIG_ENV_SPI_MAX_HZ           0 /* This force to read from DT */
  35#define CONFIG_ENV_SPI_MODE             0 /* This force to read from DT */
  36#endif
  37
  38#define CONFIG_SYS_SDRAM_BASE           0x80000000
  39#if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
  40#define CONFIG_SYS_SDRAM_SIZE           (128 * SZ_1M)
  41#elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
  42#define CONFIG_SYS_SDRAM_SIZE           (256 * SZ_1M)
  43#elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
  44#define CONFIG_SYS_SDRAM_SIZE           (512 * SZ_1M)
  45#else
  46#error Unknown DDR size - please add!
  47#endif
  48
  49#define CONFIG_CONS_INDEX               1
  50
  51#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  52#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M)
  53
  54#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
  55
  56#define CONFIG_BOARD_EARLY_INIT_R
  57#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
  58#define VCOREIII_DEFAULT_MTD_ENV                    \
  59        "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"      \
  60        "mtdids="CONFIG_MTDIDS_DEFAULT"\0"
  61#else
  62#define VCOREIII_DEFAULT_MTD_ENV    /* Go away */
  63#endif
  64
  65#define CONFIG_SYS_BOOTM_LEN      (16 << 20)      /* Increase max gunzip size */
  66
  67#define CONFIG_EXTRA_ENV_SETTINGS                                       \
  68        VCOREIII_DEFAULT_MTD_ENV                                        \
  69        "loadaddr=0x81000000\0"                                         \
  70        "spi_image_off=0x00100000\0"                                    \
  71        "console=ttyS0,115200\0"                                        \
  72        "setup=setenv bootargs console=${console} ${mtdparts}"          \
  73        "${bootargs_extra}\0"                                           \
  74        "spiboot=run setup; sf probe; sf read ${loadaddr}"              \
  75        "${spi_image_off} 0x600000; bootm ${loadaddr}\0"                \
  76        "ubootfile=u-boot.bin\0"                                        \
  77        "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};"       \
  78        "sf erase UBoot 0x100000;"                                      \
  79        "sf write ${loadaddr} UBoot  ${filesize}\0"                     \
  80        "bootcmd=run spiboot\0"                                         \
  81        ""
  82#endif                          /* __VCOREIII_H */
  83