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12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15
16#define CONFIG_CPM2 1
17
18#define CONFIG_PCI_INDIRECT_BRIDGE
19#define CONFIG_SYS_PCI_64BIT 1
20#define CONFIG_ENV_OVERWRITE
21
22#define CONFIG_FSL_VIA
23
24#ifndef __ASSEMBLY__
25extern unsigned long get_clock_freq(void);
26#endif
27#define CONFIG_SYS_CLK_FREQ get_clock_freq()
28
29
30
31
32#define CONFIG_L2_CACHE
33#define CONFIG_BTB
34
35#define CONFIG_SYS_MEMTEST_START 0x00200000
36#define CONFIG_SYS_MEMTEST_END 0x00400000
37
38#define CONFIG_SYS_CCSRBAR 0xe0000000
39#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
40
41
42#define CONFIG_SPD_EEPROM
43#define CONFIG_DDR_SPD
44
45#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
46
47#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
48#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
49
50#define CONFIG_DIMM_SLOTS_PER_CTLR 1
51#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
52
53
54#define SPD_EEPROM_ADDRESS 0x51
55
56
57
58
59#ifndef CONFIG_SPD_EEPROM
60#error ("CONFIG_SPD_EEPROM is required by MPC85555CDS")
61#endif
62
63#undef CONFIG_CLOCKS_IN_MHZ
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98
99#define CONFIG_SYS_FLASH_BASE 0xff000000
100
101#define CONFIG_SYS_BR0_PRELIM 0xff801001
102#define CONFIG_SYS_BR1_PRELIM 0xff001001
103
104#define CONFIG_SYS_OR0_PRELIM 0xff806e65
105#define CONFIG_SYS_OR1_PRELIM 0xff806e65
106
107#define CONFIG_SYS_FLASH_BANKS_LIST {0xff800000, CONFIG_SYS_FLASH_BASE}
108#define CONFIG_SYS_MAX_FLASH_BANKS 2
109#define CONFIG_SYS_MAX_FLASH_SECT 128
110#undef CONFIG_SYS_FLASH_CHECKSUM
111#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
112#define CONFIG_SYS_FLASH_WRITE_TOUT 500
113
114#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
115
116#define CONFIG_SYS_FLASH_EMPTY_INFO
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120
121#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
122#define CONFIG_SYS_LBC_SDRAM_SIZE 64
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142#define CONFIG_SYS_BR2_PRELIM 0xf0001861
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158#define CONFIG_SYS_OR2_PRELIM 0xfc006901
159
160#define CONFIG_SYS_LBC_LCRR 0x00030004
161#define CONFIG_SYS_LBC_LBCR 0x00000000
162#define CONFIG_SYS_LBC_LSRT 0x20000000
163#define CONFIG_SYS_LBC_MRTPR 0x00000000
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170
171#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
172 | LSDMR_PRETOACT7 \
173 | LSDMR_ACTTORW7 \
174 | LSDMR_BL8 \
175 | LSDMR_WRC4 \
176 | LSDMR_CL3 \
177 | LSDMR_RFEN \
178 )
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209
210#define CONFIG_FSL_CADMUS
211
212#define CADMUS_BASE_ADDR 0xf8000000
213#define CONFIG_SYS_BR3_PRELIM 0xf8000801
214#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
215
216#define CONFIG_SYS_INIT_RAM_LOCK 1
217#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
218#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
219
220#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
221#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
222
223#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
224#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
225
226
227#define CONFIG_SYS_NS16550_SERIAL
228#define CONFIG_SYS_NS16550_REG_SIZE 1
229#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
230
231#define CONFIG_SYS_BAUDRATE_TABLE \
232 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
233
234#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
235#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
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239
240#define CONFIG_SYS_I2C
241#define CONFIG_SYS_I2C_FSL
242#define CONFIG_SYS_FSL_I2C_SPEED 400000
243#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
244#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
245#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
246
247
248#define CONFIG_ID_EEPROM
249#define CONFIG_SYS_I2C_EEPROM_CCID
250#define CONFIG_SYS_ID_EEPROM
251#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
252#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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257
258#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
259#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
260#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
261#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
262#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
263#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
264#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
265#define CONFIG_SYS_PCI1_IO_SIZE 0x100000
266
267#define CONFIG_SYS_PCI2_MEM_VIRT 0xa0000000
268#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000
269#define CONFIG_SYS_PCI2_MEM_PHYS 0xa0000000
270#define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000
271#define CONFIG_SYS_PCI2_IO_VIRT 0xe2100000
272#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
273#define CONFIG_SYS_PCI2_IO_PHYS 0xe2100000
274#define CONFIG_SYS_PCI2_IO_SIZE 0x100000
275
276#ifdef CONFIG_LEGACY
277#define BRIDGE_ID 17
278#define VIA_ID 2
279#else
280#define BRIDGE_ID 28
281#define VIA_ID 4
282#endif
283
284#if defined(CONFIG_PCI)
285
286#define CONFIG_MPC85XX_PCI2
287
288#undef CONFIG_EEPRO100
289#undef CONFIG_TULIP
290
291#undef CONFIG_PCI_SCAN_SHOW
292#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
293
294#endif
295
296#if defined(CONFIG_TSEC_ENET)
297
298#define CONFIG_TSEC1 1
299#define CONFIG_TSEC1_NAME "TSEC0"
300#define CONFIG_TSEC2 1
301#define CONFIG_TSEC2_NAME "TSEC1"
302#define TSEC1_PHY_ADDR 0
303#define TSEC2_PHY_ADDR 1
304#define TSEC1_PHYIDX 0
305#define TSEC2_PHYIDX 0
306#define TSEC1_FLAGS TSEC_GIGABIT
307#define TSEC2_FLAGS TSEC_GIGABIT
308
309
310#define CONFIG_ETHPRIME "TSEC0"
311
312#endif
313
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317#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
318#define CONFIG_ENV_SECT_SIZE 0x40000
319#define CONFIG_ENV_SIZE 0x2000
320
321#define CONFIG_LOADS_ECHO 1
322#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
323
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326
327#define CONFIG_BOOTP_BOOTFILESIZE
328
329#undef CONFIG_WATCHDOG
330
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333
334#define CONFIG_SYS_LOAD_ADDR 0x2000000
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341#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
342#define CONFIG_SYS_BOOTM_LEN (64 << 20)
343
344#if defined(CONFIG_CMD_KGDB)
345#define CONFIG_KGDB_BAUDRATE 230400
346#endif
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352
353#if defined(CONFIG_TSEC_ENET)
354#define CONFIG_HAS_ETH0
355#define CONFIG_HAS_ETH1
356#define CONFIG_HAS_ETH2
357#endif
358
359#define CONFIG_IPADDR 192.168.1.253
360
361#define CONFIG_HOSTNAME "unknown"
362#define CONFIG_ROOTPATH "/nfsroot"
363#define CONFIG_BOOTFILE "your.uImage"
364
365#define CONFIG_SERVERIP 192.168.1.1
366#define CONFIG_GATEWAYIP 192.168.1.1
367#define CONFIG_NETMASK 255.255.255.0
368
369#define CONFIG_LOADADDR 200000
370
371#define CONFIG_EXTRA_ENV_SETTINGS \
372 "netdev=eth0\0" \
373 "consoledev=ttyS1\0" \
374 "ramdiskaddr=600000\0" \
375 "ramdiskfile=your.ramdisk.u-boot\0" \
376 "fdtaddr=400000\0" \
377 "fdtfile=your.fdt.dtb\0"
378
379#define CONFIG_NFSBOOTCOMMAND \
380 "setenv bootargs root=/dev/nfs rw " \
381 "nfsroot=$serverip:$rootpath " \
382 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
383 "console=$consoledev,$baudrate $othbootargs;" \
384 "tftp $loadaddr $bootfile;" \
385 "tftp $fdtaddr $fdtfile;" \
386 "bootm $loadaddr - $fdtaddr"
387
388#define CONFIG_RAMBOOTCOMMAND \
389 "setenv bootargs root=/dev/ram rw " \
390 "console=$consoledev,$baudrate $othbootargs;" \
391 "tftp $ramdiskaddr $ramdiskfile;" \
392 "tftp $loadaddr $bootfile;" \
393 "bootm $loadaddr $ramdiskaddr"
394
395#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
396
397#endif
398