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5#ifndef _X86_ASM_SCU_IPC_H_
6#define _X86_ASM_SCU_IPC_H_
7
8
9#define IPCMSG_INDIRECT_READ 0x02
10#define IPCMSG_INDIRECT_WRITE 0x05
11#define IPCMSG_WARM_RESET 0xf0
12#define IPCMSG_COLD_RESET 0xf1
13#define IPCMSG_SOFT_RESET 0xf2
14#define IPCMSG_COLD_BOOT 0xf3
15#define IPCMSG_GET_FW_REVISION 0xf4
16#define IPCMSG_WATCHDOG_TIMER 0xf8
17
18struct ipc_ifwi_version {
19 u16 minor;
20 u8 major;
21 u8 hardware_id;
22 u32 reserved[3];
23};
24
25
26int scu_ipc_simple_command(u32 cmd, u32 sub);
27int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen);
28int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out,
29 int outlen, u32 dptr, u32 sptr);
30
31#endif
32