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7#include <common.h>
8#include <asm/arch/chilisom.h>
9#include <asm/arch/cpu.h>
10#include <asm/arch/hardware.h>
11#include <asm/arch/omap.h>
12#include <asm/arch/mem.h>
13#include <asm/arch/mmc_host_def.h>
14#include <asm/arch/mux.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/emif.h>
17#include <asm/io.h>
18#include <cpsw.h>
19#include <environment.h>
20#include <errno.h>
21#include <miiphy.h>
22#include <spl.h>
23#include <watchdog.h>
24
25DECLARE_GLOBAL_DATA_PTR;
26
27static __maybe_unused struct ctrl_dev *cdev =
28 (struct ctrl_dev *)CTRL_DEVICE_BASE;
29
30#ifndef CONFIG_SKIP_LOWLEVEL_INIT
31static struct module_pin_mux uart0_pin_mux[] = {
32 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
33 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
34 {-1},
35};
36
37static struct module_pin_mux mmc0_pin_mux[] = {
38 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},
39 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},
40 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},
41 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},
42 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},
43 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},
44 {-1},
45};
46
47static struct module_pin_mux rmii1_pin_mux[] = {
48 {OFFSET(mii1_crs), MODE(1) | RXACTIVE},
49 {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},
50 {OFFSET(mii1_txen), MODE(1)},
51 {OFFSET(mii1_txd1), MODE(1)},
52 {OFFSET(mii1_txd0), MODE(1)},
53 {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},
54 {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},
55 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},
56 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},
57 {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},
58 {-1},
59};
60
61static void enable_board_pin_mux(void)
62{
63 chilisom_enable_pin_mux();
64
65
66 configure_module_pin_mux(rmii1_pin_mux);
67 configure_module_pin_mux(mmc0_pin_mux);
68}
69#endif
70
71#ifndef CONFIG_SKIP_LOWLEVEL_INIT
72void set_uart_mux_conf(void)
73{
74 configure_module_pin_mux(uart0_pin_mux);
75}
76
77void set_mux_conf_regs(void)
78{
79 enable_board_pin_mux();
80}
81
82void am33xx_spl_board_init(void)
83{
84 chilisom_spl_board_init();
85}
86#endif
87
88
89
90
91int board_init(void)
92{
93#if defined(CONFIG_HW_WATCHDOG)
94 hw_watchdog_init();
95#endif
96
97 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
98 gpmc_init();
99
100 return 0;
101}
102
103#ifdef CONFIG_BOARD_LATE_INIT
104int board_late_init(void)
105{
106#if !defined(CONFIG_SPL_BUILD)
107 uint8_t mac_addr[6];
108 uint32_t mac_hi, mac_lo;
109
110
111 mac_lo = readl(&cdev->macid0l);
112 mac_hi = readl(&cdev->macid0h);
113 mac_addr[0] = mac_hi & 0xFF;
114 mac_addr[1] = (mac_hi & 0xFF00) >> 8;
115 mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
116 mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
117 mac_addr[4] = mac_lo & 0xFF;
118 mac_addr[5] = (mac_lo & 0xFF00) >> 8;
119
120 if (!env_get("ethaddr")) {
121 printf("<ethaddr> not set. Validating first E-fuse MAC\n");
122
123 if (is_valid_ethaddr(mac_addr))
124 eth_env_set_enetaddr("ethaddr", mac_addr);
125 }
126
127 mac_lo = readl(&cdev->macid1l);
128 mac_hi = readl(&cdev->macid1h);
129 mac_addr[0] = mac_hi & 0xFF;
130 mac_addr[1] = (mac_hi & 0xFF00) >> 8;
131 mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
132 mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
133 mac_addr[4] = mac_lo & 0xFF;
134 mac_addr[5] = (mac_lo & 0xFF00) >> 8;
135
136 if (!env_get("eth1addr")) {
137 if (is_valid_ethaddr(mac_addr))
138 eth_env_set_enetaddr("eth1addr", mac_addr);
139 }
140#endif
141
142 return 0;
143}
144#endif
145